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2021-06-24target/mips: Move translate.h to tcg/ sub directoryPhilippe Mathieu-Daudé1-0/+0
2021-06-24target/mips: Move TCG trace events to tcg/ sub directoryPhilippe Mathieu-Daudé5-3/+3
2021-06-24target/mips: Do not abort on invalid instructionPhilippe Mathieu-Daudé1-2/+2
2021-06-24target/mips: Raise exception when DINSV opcode used with DSP disabledPhilippe Mathieu-Daudé1-1/+2
2021-06-24target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insnPhilippe Mathieu-Daudé1-0/+4
2021-06-24target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn()Philippe Mathieu-Daudé1-0/+2
2021-06-24target/mips: Fix potential integer overflow (CID 1452921)Philippe Mathieu-Daudé1-1/+2
2021-06-24Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2021-06-...Peter Maydell16-52/+59
2021-06-22Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-re...Peter Maydell7-8/+89
2021-06-22Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210621' into...Peter Maydell30-596/+1626
2021-06-22Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210619-2' in...Peter Maydell39-1193/+1444
2021-06-21Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/python-pull-request' ...Peter Maydell15-1154/+1712
2021-06-21Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request'...Peter Maydell34-2073/+3174
2021-06-21MAINTAINERS: Add qtest/arm-cpu-features.c to ARM TCG CPUs sectionPhilippe Mathieu-Daudé1-0/+1
2021-06-21s390x/css: Add passthrough IRBEric Farman4-1/+23
2021-06-21s390x/css: Refactor IRB constructionEric Farman4-16/+33
2021-06-21s390x/css: Split out the IRB sense dataEric Farman1-7/+12
2021-06-21s390x/css: Introduce an ESW structEric Farman2-7/+24
2021-06-21linux-user/s390x: Save and restore psw.mask properlyRichard Henderson1-5/+32
2021-06-21target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstubRichard Henderson1-13/+2
2021-06-21target/s390x: Improve s390_cpu_dump_state vs cc_opRichard Henderson1-5/+7
2021-06-21target/s390x: Do not modify cpu state in s390_cpu_get_psw_maskRichard Henderson1-4/+4
2021-06-21target/s390x: Expose load_psw and get_psw_mask to cpu.hRichard Henderson6-61/+69
2021-06-21configure: Check whether we can compile the s390-ccw bios with -msoft-floatThomas Huth1-1/+1
2021-06-21s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2David Hildenbrand3-8/+14
2021-06-21s390x/tcg: We support Vector enhancements facilityDavid Hildenbrand1-0/+1
2021-06-21linux-user: elf: s390x: Prepare for Vector enhancements facilityDavid Hildenbrand2-0/+8
2021-06-21s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM)David Hildenbrand5-0/+391
2021-06-21s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand4-2/+49
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand3-8/+87
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATEDavid Hildenbrand3-2/+70
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATIONDavid Hildenbrand1-33/+73
2021-06-21s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDEDDavid Hildenbrand3-1/+30
2021-06-21s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENEDDavid Hildenbrand3-3/+30
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALARDavid Hildenbrand3-9/+77
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *David Hildenbrand3-12/+121
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT)David Hildenbrand3-15/+109
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT)David Hildenbrand3-14/+153
2021-06-21s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICALDavid Hildenbrand2-0/+52
2021-06-21s390x/tcg: Implement VECTOR BIT PERMUTEDavid Hildenbrand4-0/+33
2021-06-21s390x/tcg: Simplify wfc64() handlingDavid Hildenbrand1-11/+12
2021-06-21s390x/tcg: Simplify vflr64() handlingDavid Hildenbrand3-25/+8
2021-06-21s390x/tcg: Simplify vfll32() handlingDavid Hildenbrand3-22/+6
2021-06-21s390x/tcg: Simplify vfma64() handlingDavid Hildenbrand3-32/+20
2021-06-21s390x/tcg: Simplify vftci64() handlingDavid Hildenbrand3-24/+13
2021-06-21s390x/tcg: Simplify vfc64() handlingDavid Hildenbrand3-107/+38
2021-06-21s390x/tcg: Simplify vop64_2() handlingDavid Hildenbrand3-156/+58
2021-06-21s390x/tcg: Simplify vop64_3() handlingDavid Hildenbrand3-79/+30
2021-06-21s390x/tcg: Fix instruction name for VECTOR FP LOAD (LENGTHENED|ROUNDED)David Hildenbrand1-2/+2
2021-06-21s390x/tcg: Fix FP CONVERT TO (LOGICAL) FIXED NaN handlingDavid Hildenbrand2-6/+43
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