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2018-09-17target/xtensa: fix s32c1i TCGMemOp flagsMax Filippov1-1/+1
2018-09-17tests/tcg/xtensa: only generate defined exception handlersMax Filippov1-0/+16
2018-09-17tests/tcg/xtensa: move exception handlers to separate sectionMax Filippov1-15/+22
2018-09-17target/xtensa: fix FPU2000 bugsMax Filippov1-3/+3
2018-09-17tests/tcg/xtensa: add test for failed memory transactionsMax Filippov2-0/+125
2018-09-17target/xtensa: convert to do_transaction_failedMax Filippov4-16/+35
2018-08-19target/xtensa: add test_kc705_be coreMax Filippov5-0/+46004
2018-08-19target/xtensa: clean up gdbstub register handlingMax Filippov3-23/+51
2018-08-19target/xtensa: fix gdbstub register countsMax Filippov1-1/+3
2018-08-17Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' in...Peter Maydell6-5/+629
2018-08-16Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-aug-2018' int...Peter Maydell13-150/+526
2018-08-16qemu-doc: Amend MIPS-related itemsAleksandar Markovic1-2/+11
2018-08-16linux-user: Add preprocessor availability control to some syscallsAleksandar Rikalo2-1/+42
2018-08-16linux-user: Update MIPS syscall numbers up to kernel 4.18 headersAleksandar Markovic2-0/+27
2018-08-16elf: Add ELF flags for MIPS machine variantsAleksandar Markovic1-0/+23
2018-08-16elf: Remove duplicate preprocessor constant definitionAleksandar Markovic1-1/+0
2018-08-16target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0Yongbok Kim1-4/+4
2018-08-16target/mips: Don't update BadVAddr register in Debug ModeYongbok Kim2-4/+12
2018-08-16target/mips: Implement CP0 Config1.WR bit functionalityStefan Markovic1-0/+8
2018-08-16target/mips: Add CP0 BadInstrX registerStefan Markovic3-3/+25
2018-08-16target/mips: Update some CP0 registers bit definitionsAleksandar Markovic1-69/+88
2018-08-16target/mips: Fix two instances of shadow variablesAleksandar Markovic1-2/+2
2018-08-16target/mips: Mark switch fallthroughs with interpretable commentsAleksandar Markovic1-2/+3
2018-08-16target/mips: Avoid case statements formulated by ranges - part 2Aleksandar Rikalo1-7/+71
2018-08-16target/mips: Avoid case statements formulated by ranges - part 1Aleksandar Markovic1-49/+200
2018-08-16MAINTAINERS: Update target/mips maintainer's email addressesAleksandar Markovic2-6/+10
2018-08-16i386: Disable TOPOEXT by default on "-cpu host"Eduardo Habkost1-0/+6
2018-08-16target-i386: adds PV_SEND_IPI CPUID feature bitWanpeng Li1-1/+1
2018-08-16i386: Add new CPU model Icelake-{Server,Client}Robert Hoo1-0/+115
2018-08-16i386: Add CPUID bit for WBNOINVDRobert Hoo2-1/+3
2018-08-16i386: Add CPUID bit for PCONFIGRobert Hoo2-1/+2
2018-08-16i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSRRobert Hoo2-1/+3
2018-08-16i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIESRobert Hoo1-0/+2
2018-08-16docs: add guidance on configuring CPU models for x86Daniel P. Berrangé4-1/+497
2018-08-16Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180816'...Peter Maydell38-126/+2863
2018-08-16hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()Thomas Huth1-21/+11
2018-08-16softfloat: Fix missing inexact for floating-point addRichard Henderson1-1/+1
2018-08-16target/arm: Fix aa64 FCADD and FCMLA decodeRichard Henderson1-6/+6
2018-08-16target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-halfRichard Henderson1-2/+2
2018-08-16target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_hRichard Henderson1-1/+1
2018-08-16target/arm: Ignore float_flag_input_denormal from fp_status_f16Richard Henderson1-1/+5
2018-08-16target/arm: Adjust FPCR_MASK for FZ16Richard Henderson2-1/+6
2018-08-16aspeed: add a max_ram_size property to the memory controllerCédric Le Goater4-0/+37
2018-08-16aspeed_sdmc: Handle ECC trainingJoel Stanley1-0/+9
2018-08-16aspeed_sdmc: Init status always idleJoel Stanley1-0/+15
2018-08-16aspeed_sdmc: Set 'cache initial sequence' always trueJoel Stanley1-0/+1
2018-08-16aspeed_sdmc: Fix saved valuesJoel Stanley2-19/+9
2018-08-16aspeed_sdmc: Extend number of valid registersJoel Stanley1-1/+1
2018-08-16imx_spi: Unset XCH when TX FIFO becomes emptyTrent Piepho1-2/+1
2018-08-16Add QTest testcase for the Intel HexadecimalSu Hang5-0/+75
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