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2013-07-18libqos: Add support for memory-mapped fw_cfgMarkus Armbruster2-0/+32
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-id: 1372254743-15808-5-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18libqos: include dependenciesAnthony Liguori1-0/+1
Otherwise rebuilds can fail when libqos is modified. Reported-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-id: 1372254743-15808-4-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18boot-order-test: New; covering just PC for nowMarkus Armbruster2-0/+75
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-id: 1372254743-15808-3-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18qtest: Don't reset on qtest chardev connectMarkus Armbruster1-1/+6
libqtest's qtest_init() connecting to the qtest socket triggers reset. This was coded in the hope we could use the same QEMU process for multiple tests that way. Never used. Injects an extra reset even when it's not used, and that can mess up tests such as the one of -boot once I'm about to add. Drop it. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-id: 1372254743-15808-2-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18libqtest: New qtest_end() to go with qtest_start()Markus Armbruster4-6/+18
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1371711329-9144-3-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18libqtest: Plug fd and memory leaks in qtest_quit()Markus Armbruster1-0/+4
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Message-id: 1371711329-9144-2-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18monitor: maintain at most one G_IO_OUT watchLaszlo Ersek1-2/+9
When monitor_flush() is invoked repeatedly outside the monitor_unblocked() callback, for example from tlb_info() -> ... -> print_pte(), several watches may be added for the same event. This is no problem per se because the extra monitor_unblocked() callbacks are harmless if mon->outbuf is empty, the watches will be removed gradually. However a big number of watches can grow "gpollfds" without limit in glib_pollfds_fill(), triggering a -1/EINVAL condition in g_poll(). Keep at most one such watch, by following the pattern observable in eg. commits c874ea97 and c3d6b96e. The change has no effect when monitor_unblocked() calls monitor_flush() (when the watch can either be removed or renewed 1-for-1), but non-callback contexts won't create an additional watch when the monitor already has one. Related RHBZ: https://bugzilla.redhat.com/show_bug.cgi?id=970047 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1373998781-29561-3-git-send-email-lersek@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18char: io_channel_send: don't lose written bytesLaszlo Ersek1-22/+19
The g_io_channel_write_chars() documentation states, bytes_written: The number of bytes written. This can be nonzero even if the return value is not G_IO_STATUS_NORMAL. [...] io_channel_send() could lose such bytes before. Furthermore, the (status == G_IO_STATUS_EOF) condition used to evaluate to constant false whenever it was reached. When that condition actually held, it always led to -1 / EINVAL. This patch (almost) distinguishes G_IO_STATUS_EOF only when no bytes have been written, and then treats it as an error. Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1373998781-29561-2-git-send-email-lersek@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18configure: Provide more helpful message if libvte not presentPeter Maydell1-7/+11
If the system has GTK but not libvte, it's more helpful to tell the user that libvte is missing than to simply say that GTK is not present. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1374162121-31582-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18Merge remote-tracking branch 'awilliam/tags/vfio-for-qemu-1.6' into stagingAnthony Liguori1-336/+446
vfio: enhanced VGA quirks + AER error containment # gpg: Signature made Wed 17 Jul 2013 05:39:38 PM CDT using RSA key ID 3BB08B22 # gpg: Can't check signature: public key not found # By Alex Williamson (1) and Vijay Mohan Pandarathil (1) # Via Alex Williamson * awilliam/tags/vfio-for-qemu-1.6: vfio: QEMU-AER: Qemu changes to support AER for VFIO-PCI devices vfio-pci: VGA quirk update Message-id: 20130717224939.4763.87264.stgit@bling.home Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18Merge remote-tracking branch 'luiz/queue/qmp' into stagingAnthony Liguori2-9/+15
# By Amos Kong (1) and Luiz Capitulino (1) # Via Luiz Capitulino * luiz/queue/qmp: qmp: update send-key document qapi: qapi-commands: fix possible leaks on visitor dealloc Message-id: 1374093679-29213-1-git-send-email-lcapitulino@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18Merge remote-tracking branch 'bonzini/scsi-next' into stagingAnthony Liguori1-28/+76
# By Peter Lieven (4) and Ronnie Sahlberg (1) # Via Paolo Bonzini * bonzini/scsi-next: iscsi: factor out sector conversions iscsi: assert that sectors are aligned to LUN blocksize iscsi: remove support for misaligned nb_sectors in aio_readv iscsi: fix -ENOSPC in iscsi_create() Fix iSCSI crash on SG_IO with an iovector Message-id: 1374073524-8469-1-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori17-10/+353
pci,net,pc enhancements This includes some fixes and enhancements that accumulated in my tree: pci fixes by dkoch, virtio-net enhancements by akong and mst, and a fix for xen pc by mst. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 17 Jul 2013 04:44:45 AM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By Don Koch (2) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: pc: don't access fw cfg if NULL virtio-net: add feature bit for any header s/g net: add support of mac-programming over macvtap in QEMU side pci: fix BRDIGE typo pci-bridge: update mappings for migration/restore Message-id: 1374054430-21966-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-17qmp: update send-key documentAmos Kong1-2/+5
commit 9f328977 changes qmp_send_key() to accept key codes in hex, but the document wasn't updated. The items of keys list is union now, not enum. Signed-off-by: Amos Kong <akong@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2013-07-17iscsi: factor out sector conversionsPeter Lieven1-3/+7
Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Peter Lieven <pl@kamp.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-17iscsi: assert that sectors are aligned to LUN blocksizePeter Lieven1-0/+20
if the blocksize of an iSCSI LUN is bigger than the BDRV_SECTOR_SIZE it is possible that sector_num or nb_sectors are not correctly aligned. to avoid corruption we fail requests which are misaligned. Signed-off-by: Peter Lieven <pl@kamp.de> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-17iscsi: remove support for misaligned nb_sectors in aio_readvPeter Lieven1-18/+4
this hask is not working (anymore). support for misaligned offsets should be handled at the block layer. Signed-off-by: Peter Lieven <pl@kamp.de> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-17iscsi: fix -ENOSPC in iscsi_create()Peter Lieven1-0/+1
the -ENOPSC case did not work due to the missing goto. Reported-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Peter Lieven <pl@kamp.de> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-17Fix iSCSI crash on SG_IO with an iovectorRonnie Sahlberg1-7/+44
Don't assume that SG_IO is always invoked with a simple buffer, check the iovec_count and if it is >= 1 then we need to pass an array of iovectors to libiscsi instead of just a plain buffer. Signed-off-by: Ronnie Sahlberg <ronniesahlberg@gmail.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-16qapi: qapi-commands: fix possible leaks on visitor deallocLuiz Capitulino1-7/+10
In qmp-marshal.c the dealloc visitor calls use the same errp pointer of the input visitor calls. This means that if any of the input visitor calls fails, then the dealloc visitor will return early, before freeing the object's memory. Here's an example, consider this code: int qmp_marshal_input_block_passwd(Monitor *mon, const QDict *qdict, QObject **ret) { [...] char * device = NULL; char * password = NULL; mi = qmp_input_visitor_new_strict(QOBJECT(args)); v = qmp_input_get_visitor(mi); visit_type_str(v, &device, "device", errp); visit_type_str(v, &password, "password", errp); qmp_input_visitor_cleanup(mi); if (error_is_set(errp)) { goto out; } qmp_block_passwd(device, password, errp); out: md = qapi_dealloc_visitor_new(); v = qapi_dealloc_get_visitor(md); visit_type_str(v, &device, "device", errp); visit_type_str(v, &password, "password", errp); qapi_dealloc_visitor_cleanup(md); [...] return 0; } Consider errp != NULL when the out label is reached, we're going to leak device and password. This patch fixes this by always passing errp=NULL for dealloc visitors, meaning that we always try to free them regardless of any previous failure. The above example would then be: out: md = qapi_dealloc_visitor_new(); v = qapi_dealloc_get_visitor(md); visit_type_str(v, &device, "device", NULL); visit_type_str(v, &password, "password", NULL); qapi_dealloc_visitor_cleanup(md); Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2013-07-15vfio: QEMU-AER: Qemu changes to support AER for VFIO-PCI devicesVijay Mohan Pandarathil1-0/+125
Add support for error containment when a VFIO device assigned to a KVM guest encounters an error. This is for PCIe devices/drivers that support AER functionality. When the host OS is notified of an error in a device either through the firmware first approach or through an interrupt handled by the AER root port driver, the error handler registered by the vfio-pci driver gets invoked. The qemu process is signaled through an eventfd registered per VFIO device by the qemu process. In the eventfd handler, qemu decides on what action to take. In this implementation, guest is brought down to contain the error. The kernel patches for the above functionality has been already accepted. This is a refresh of the QEMU patch which was reviewed earlier. http://marc.info/?l=linux-kernel&m=136281557608087&w=2 This patch has the same contents and has been built after refreshing to latest upstream and after the linux headers have been updated in qemu. - Create eventfd per vfio device assigned to a guest and register an event handler - This fd is passed to the vfio_pci driver through the SET_IRQ ioctl - When the device encounters an error, the eventfd is signalled and the qemu eventfd handler gets invoked. - In the handler decide what action to take. Current action taken is to stop the guest. Signed-off-by: Vijay Mohan Pandarathil <vijaymohan.pandarathil@hp.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2013-07-15vfio-pci: VGA quirk updateAlex Williamson1-336/+321
Turns out all the suspicions for AMD devices were correct, everywhere we read a BAR address that the address matches the config space offset, there's full access to PCI config space. Attempt to generalize some helpers to allow quirks to easily be added for mirrors and windows. Also fill in complete config space for AMD. Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2013-07-15Merge remote-tracking branch 'quintela/migration.next' into stagingAnthony Liguori8-1/+134
# By Chegu Vinod # Via Juan Quintela * quintela/migration.next: Force auto-convegence of live migration Add 'auto-converge' migration capability Introduce async_run_on_cpu() Message-id: 1373664508-5404-1-git-send-email-quintela@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-15Merge remote-tracking branch 'cohuck/virtio-ccw-upstr' into stagingAnthony Liguori1-0/+3
# By Dominik Dingel # Via Cornelia Huck * cohuck/virtio-ccw-upstr: virtio-ccw: Enable x-data-plane for virtio-ccw-blk Message-id: 1373903207-27085-1-git-send-email-cornelia.huck@de.ibm.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-15Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130715-1' into ↵Anthony Liguori4-31/+161
staging target-arm queue # gpg: Signature made Mon 15 Jul 2013 11:15:13 AM CDT using RSA key ID 14360CDE # gpg: Can't check signature: public key not found # By Mans Rullgard (3) and others # Via Peter Maydell * pmaydell/tags/pull-target-arm-20130715-1: target-arm: Avoid g_hash_table_get_keys() target-arm: avoid undefined behaviour when writing TTBCR target-arm/helper.c: Allow const opaques in arm CP target-arm/helper.c: Implement MIDR aliases target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup target-arm: explicitly decode SEVL instruction target-arm: implement LDA/STL instructions target-arm: add feature flag for ARMv8 Message-id: 1373905022-27735-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-15Merge remote-tracking branch 'pmaydell/tags/pull-arm-devs-20130715' into stagingAnthony Liguori6-22/+79
arm-devs queue # gpg: Signature made Mon 15 Jul 2013 10:53:44 AM CDT using RSA key ID 14360CDE # gpg: Can't check signature: public key not found # By Peter Maydell (4) and others # Via Peter Maydell * pmaydell/tags/pull-arm-devs-20130715: ARM/highbank: add support for Calxeda ECX-2000 / Midway ARM/highbank: prepare for adding similar machines hw/arm/vexpress: Add alias for flash at address 0 on A15 board hw/dma/omap_dma: Fix bugs with DMA requests above 32 sd/pl181.c: Avoid undefined shift behaviour in RWORD macro hw/cpu/a15mpcore: Correct default value for num-irq char/cadence_uart: Fix reset for unattached instances Message-id: 1373904095-27592-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-15Merge remote-tracking branch 'rth/axp-next' into stagingAnthony Liguori5-97/+93
# By Richard Henderson # Via Richard Henderson * rth/axp-next: hw/alpha: Use SRM epoch hw/alpha: Drop latch_tmp hack exec: Support 64-bit operations in address_space_rw hw/alpha: Don't machine check on missing pci i/o hw/alpha: Don't use get_system_io Message-id: 1373840171-25556-1-git-send-email-rth@twiddle.net Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-15Merge remote-tracking branch 'kwolf/for-anthony' into stagingAnthony Liguori21-76/+262
# By Kevin Wolf (6) and Stefan Hajnoczi (2) # Via Kevin Wolf * kwolf/for-anthony: ahci: Fix FLUSH command migration: Fail migration on bdrv_flush_all() error cpus: Add return value for vm_stop() block: Add return value for bdrv_flush_all() qemu-iotests: Update 051 reference output block: Don't parse protocol from file.filename block: add drive_backup HMP command blockdev: add sync mode to drive-backup QMP command Message-id: 1373887000-4488-1-git-send-email-kwolf@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-15pc: don't access fw cfg if NULLMichael S. Tsirkin1-1/+1
commit f8c457b88d72a48989f190bc3d7b79f4f3b7d11c "pc: pass PCI hole ranges to Guests" broke Xen as it has no fw_cfg. Check for this configuration and boil out. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-15virtio-net: add feature bit for any header s/gMichael S. Tsirkin3-0/+7
Old qemu versions required that 1st s/g entry is the header. Since QEMU 1.5, patchset titled "virtio-net: iovec handling cleanup" removed this limitation but a feature bit is needed so guests know it's safe to lay out header differently. This patch applies on top and adds such a feature bit to QEMU. It is set by default for virtio-net. virtio net header inline with the data is beneficial for latency and small packet bandwidth - guest driver code utilizing this feature has been acked but missed 3.11 by a narrow margin, it's pending for 3.12. This feature bit is cleared by default when compatibility with old machine types is requested. Other performance-sensitive devices (blk and scsi) don't yet support arbitrary s/g layouts, so we only set this bit for virtio-net for now. There are plans to allow arbitrary layouts there, but no code has been posted yet. Cc: Rusty Russell <rusty@rustcorp.com.au> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-15net: add support of mac-programming over macvtap in QEMU sideAmos Kong8-6/+336
Currently macvtap based macvlan device is working in promiscuous mode, we want to implement mac-programming over macvtap through Libvirt for better performance. Design: QEMU notifies Libvirt when rx-filter config is changed in guest, then Libvirt query the rx-filter information by a monitor command, and sync the change to macvtap device. Related rx-filter config of the nic contains main mac, rx-mode items and vlan table. This patch adds a QMP event to notify management of rx-filter change, and adds a monitor command for management to query rx-filter information. Test: If we repeatedly add/remove vlan, and change macaddr of vlan interfaces in guest by a loop script. Result: The events will flood the QMP client(management), management takes too much resource to process the events. Event_throttle API (set rate to 1 ms) can avoid the events to flood QMP client, but it could cause an unexpected delay (~1ms), guests guests normally expect rx-filter updates immediately. So we use a flag for each nic to avoid events flooding, the event is emitted once until the query command is executed. The flag implementation could not introduce unexpected delay. There maybe exist an uncontrollable delay if we let Libvirt do the real change, guests normally expect rx-filter updates immediately. But it's another separate issue, we can investigate it when the work in Libvirt side is done. Michael S. Tsirkin: tweaked to enable events on start Michael S. Tsirkin: fixed not to crash when no id Michael S. Tsirkin: fold in patch: "additional fixes for mac-programming feature" Amos Kong: always notify QMP client if mactable is changed Amos Kong: return NULL list if no net client supports rx-filter query Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Amos Kong <akong@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-15target-arm: Avoid g_hash_table_get_keys()Peter Maydell1-2/+10
g_hash_table_get_keys() was only introduced in glib 2.14, and we're still targeting a minimum version of 2.12. Rewrite the offending code (introduced in commit 721fae1) to use g_hash_table_foreach() to build the list of keys. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Tested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1372678819-8633-1-git-send-email-peter.maydell@linaro.org
2013-07-15target-arm: avoid undefined behaviour when writing TTBCRPeter Maydell1-2/+4
LPAE CPUs have more potentially valid bits in the TTBCR, and so the simple masking out of invalid bits is no longer sufficient to obtain the base address width field of the register, which is what we use to precalculate c2_mask and c2_base_mask. Explicitly extract the relevant register field rather than simply shifting by the register value. This bug would have had no ill effects in practice, since if the EAE bit (TTBCR bit 31) is set then we don't use the precalculated masks, and if EAE is zero then bits 30..3 are all UNK/SBZP, so well-behaved guests won't set them. However the shift is undefined behaviour, so we should avoid it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1372347527-4428-1-git-send-email-peter.maydell@linaro.org
2013-07-15target-arm/helper.c: Allow const opaques in arm CPPeter Crosthwaite1-1/+3
Allow for defining const opaque data in ARM CP register definitions by setting .opaque = foo. If non null opaque is passed into define_one_arm_cp_reg_with_opaque then that opaque will take precedence, otherwise if null opaque is passed, the original opaque data will be used. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: cf0a3ac3438d97464240db9f5f4ef1585cbc1d77.1373429432.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15target-arm/helper.c: Implement MIDR aliasesPeter Crosthwaite1-5/+11
Unimplemented registers in the cp15, CRn=0, opc1=0, CRm=0 space default to aliasing the MIDR register. Set all registers in the space to access MIDR by default. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 6127846712b7ad2727354a4f5e1d809451f1e859.1373429432.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanupPeter Crosthwaite1-9/+4
The if block detecting OMAP/StrongARM modifies the id_cp_reginfo .access fields in place. So there is no need to replicate the call to define_arm_cp_reg(). Dropped, and let the OMAP case fall through to the normal behaviour after the in-place modification. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 72aae9b8ebbc9a76d2b06faf8666ef8a4b34b92a.1373429432.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15target-arm: explicitly decode SEVL instructionMans Rullgard1-1/+2
The ARMv8 SEVL instruction is in the architectural hint space already emulated as nop. This makes the decoding of SEVL explicit for clarity. Signed-off-by: Mans Rullgard <mans@mansr.com> Message-id: 1370606786-5650-3-git-send-email-mans@mansr.com [PMM: added 'SEVL' to the TODO comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15target-arm: implement LDA/STL instructionsMans Rullgard1-10/+119
This adds support for the ARMv8 load acquire/store release instructions. Since qemu does nothing special for memory barriers, these can be emulated like their non-acquire/release counterparts. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15virtio-ccw: Enable x-data-plane for virtio-ccw-blkDominik Dingel1-0/+3
Add property x-data-plane to virtio-ccw-blk devices. Signed-off-by: Dominik Dingel <dingel@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2013-07-15ARM/highbank: add support for Calxeda ECX-2000 / MidwayAndre Przywara1-5/+27
The Calxeda ECX-2000 chip (aka. Midway) is model-wise quite similar to the Highbank. The most prominent difference is the Cortex-A15 CPU core in it, together with the associated core peripherals. Add a new ARM machine type called "midway". Move the L2 cache controller device into the Highbank specific part, since Midway does not have (and need) it. Signed-off-by: Andre Przywara <andre.przywara@calxeda.com> Message-id: 1373026897-12085-3-git-send-email-andre.przywara@calxeda.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15ARM/highbank: prepare for adding similar machinesAndre Przywara1-6/+23
To allow the modelling of machines similar to Calxeda Highbank, introduce a parameter to the init function and call it from a wrapper. This allows to tweak the definition for individual machines later on. Signed-off-by: Andre Przywara <andre.przywara@calxeda.com> Message-id: 1373026897-12085-2-git-send-email-andre.przywara@calxeda.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15hw/arm/vexpress: Add alias for flash at address 0 on A15 boardPeter Maydell1-2/+17
The A15 Versatile Express board can remap a variety of things at address 0. We don't currently emulate the Serial Configuration Controller which is how the guest can control this remapping, but we can provide the initial default mapping of the first flash device into this space. In particular this allows QEMU to boot flash images such as UEFI which expect to include an exception vector table. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Grant Likely <grant.likely@linaro.org> Message-id: 1373374180-19884-1-git-send-email-peter.maydell@linaro.org
2013-07-15hw/dma/omap_dma: Fix bugs with DMA requests above 32Peter Maydell1-5/+6
The drqbmp field of struct soc_dma_s is a uint64_t; however several places in the code attempt to set bits in it using "(1 << drq)", which will fail if drq is large enough that the 1 bit gets shifted off the top of a 32 bit integer. Change these to "(1ULL << drq)" so that the promotion to 64 bit happens before the shift rather than afterwards. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1372423919-5669-1-git-send-email-peter.maydell@linaro.org
2013-07-15sd/pl181.c: Avoid undefined shift behaviour in RWORD macroPeter Maydell1-1/+1
Add a cast to avoid potentially shifting into the sign bit of a signed value, which is undefined behaviour in C. (Detected with clang's -fsanitize=undefined.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1372341831-4264-1-git-send-email-peter.maydell@linaro.org
2013-07-15hw/cpu/a15mpcore: Correct default value for num-irqPeter Maydell1-2/+2
The a15mpcore device claims that its default value for num-irq is the number of interrupts used by the A15MP in the vexpress-a15 board. However that chip has 128 external interrupts, not 64. Since there is only one A15 based model in QEMU currently, we can fix this by simply changing the default value. This error was causing recent (3.10) Linux kernels to print warnings/backtraces when the number of interrupts reported by the GIC was smaller than an interrupt number they wanted to use. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1373032481-15280-1-git-send-email-peter.maydell@linaro.org
2013-07-15target-arm: add feature flag for ARMv8Mans Rullgard3-1/+8
Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15char/cadence_uart: Fix reset for unattached instancesPeter Crosthwaite1-1/+3
commit 1db8b5efe0c2b5000e50691eea61264a615f43de introduced an issue where QEMU would segfault if you have an unattached Cadence UART. Fix by guarding the flush-on-reset logic on there being a qemu_chr attachment. Reported-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Message-id: 9009578ee10a50d994b2e10aa2840d73765f5968.1370577272.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15ahci: Fix FLUSH commandKevin Wolf3-1/+17
AHCI couldn't cope with asynchronous commands that aren't doing DMA, it simply wouldn't complete them. Due to the bug fixed in commit f68ec837, FLUSH commands would seem to have completed immediately even if they were still running on the host. After the commit, they would simply hang and never unset the BSY bit, rendering AHCI unusable on any OS sending flushes. This patch adds another callback for the completion of asynchronous commands. This is what AHCI really wants to use for its command completion logic rather than an DMA completion callback. Cc: qemu-stable@nongnu.org Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-07-15migration: Fail migration on bdrv_flush_all() errorKevin Wolf1-3/+14
If bdrv_flush_all() returns an error, there is an inconsistency in the view of an image file between the source and the destination host. Completing the migration would lead to corruption. Better abort migration in this case. To reproduce this case, try the following (ensures that there is something to flush, and then fails that flush): $ qemu-img create -f qcow2 test.qcow2 1G $ cat blkdebug.cfg [inject-error] event = "flush_to_os" errno = "5" $ qemu-system-x86_64 -hda blkdebug:blkdebug.cfg:test.qcow2 -monitor stdio (qemu) qemu-io ide0-hd0 "write 0 4k" (qemu) migrate ... Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-07-15cpus: Add return value for vm_stop()Kevin Wolf3-10/+16
If flushing the block devices fails, return an error. The VM is stopped anyway. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
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