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2022-01-07bsd-user/arm/target_arch_elf.h: arm get hwcapWarner Losh1-1/+71
Implement get_elf_hwcap to get the first word of hardware capabilities. Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_elf.h: arm defines for ELFWarner Losh1-0/+36
Basic set of defines needed for arm ELF file activation. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_thread.h: Routines to create and switch to a threadWarner Losh1-0/+82
Implement target_thread_init (to create a thread) and target_set_upcall (to switch to a thread) for arm. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2022-01-07bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for armWarner Losh1-0/+49
Copy of the signal trampoline code for arm, as well as setup_sigtramp to write it to the stack. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_vmparam.h: Parameters for arm address spaceWarner Losh1-0/+48
Various parameters describing the layout of the ARM address space. In addition, define routines to get the stack pointer and to set the second return value. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_reg.h: Implement core dump register copyingWarner Losh1-0/+60
Implement the register copying routines to extract registers from the cpu for core dump generation. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_cpu.h: Implement system call dispatchWarner Losh1-0/+94
Implement the system call dispatch. This implements all three kinds of system call: direct and the two indirect variants. It handles all the special cases for thumb as well. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_cpu.h: Implement data abort exceptionsWarner Losh1-0/+11
Implement EXCP_PREFETCH_ABORT AND EXCP_DATA_ABORT. Both of these data exceptions cause a SIGSEGV. Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Olivier Houchard <cognet@ci0.org> Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptionsWarner Losh1-0/+33
Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and EXCP_YIELD. The first two generate a signal to the emulated binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy nops. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Mikaël Urankar <mikael.urankar@gmail.com> Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementationWarner Losh1-0/+22
Add a boiler plate CPU loop that does nothing except return an error for all traps. Signed-off-by: Sean Bruno <sbruno@FreeBSD.org> Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regsWarner Losh1-0/+8
Implement target_cpu_clone_regs to clone the resister state on a fork. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_cpu.h: CPU Loop definitionsWarner Losh1-0/+43
target_arch_cpu.h is for CPU loop definitions. Create the file and define target_cpu_init and target_cpu_reset for arm. Signed-off-by: Olivier Houchard <cognet@ci0.org> Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_cpu.c: Target specific TLS routinesWarner Losh2-0/+67
Target specific TLS routines to get and set the TLS values. Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_syscall.h: Add copyright and update nameWarner Losh1-4/+23
The preferred name for the 32-bit arm is now armv7. Update the name to reflect that. In addition, add Stacey's copyright to this file and update the include guards to the new convention. Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/arm/target_arch_sysarch.h: Use consistent include guardsWarner Losh1-3/+3
As part of upstreaming, the include guards have been made more consistent. Update this file to use the new guards. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/target_os_signal.h: Move signal prototypes to target_os_ucontext.hWarner Losh3-18/+11
Switch to the CPUArchState typedef and move target-provided prototypes to target_os_ucontext.h. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/x86_64: Move functions into signal.cWarner Losh2-36/+63
Move the current inline functions into sigal.c. This will increate the flexibility of implementation in the future. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/x86_64/target_arch_signal.h: Fill in mcontext_tWarner Losh1-0/+54
Fill in target_mcontext match the FreeBSD mcontext_t structure. Also define the size correctly. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/x86_64/target_arch_signal.h: use new target_os_ucontext.hWarner Losh1-8/+1
Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/x86_64/target_arch_signal.h: Remove target_sigcontextWarner Losh1-4/+0
In FreeBSD, sigcontext was retired in favor of ucontext/mcontext. Remove vestigial target_sigcontext. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/i386: Move the inlines into signal.cWarner Losh2-36/+63
Move the (now stubbed out) inlines into bsd-user/i386/signal.c. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/i386/target_arch_signal.h: Update mcontext_t to match FreeBSDWarner Losh1-0/+46
Fill in target_mcontext_t to match the FreeBSD mcontex_t. Also tag the current size of mcontext and ucontext to enable size checking for i386. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.hWarner Losh1-8/+1
Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/i386/target_arch_signal.h: Remove target_sigcontextWarner Losh1-4/+0
In FreeBSD, sigcontext was retired in favor of ucontext/mcontext. Remove vestigial target_sigcontext. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user: create a per-arch signal.c fileWarner Losh3-1/+3
Create a place-holder signal.c file for each of the architectures that are currently built. In the future, some code that's currently inlined in target_arch_signal.h will live here. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/freebsd: Create common target_os_ucontext.h fileWarner Losh2-3/+35
FreeBSD has a MI ucontext structure that contains the MD mcontext machine state and other things that are machine independent. Create an include file for all the ucontext stuff. It needs to be included in the arch specific files after target_mcontext is defined. This is largely copied from sys/_ucontext.h with the comments about layout removed because we don't support ancient FreeBSD binaries. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07bsd-user/mips*: Remove mips supportWarner Losh4-243/+0
FreeBSD is dropping support for mips starting with FreeBSD 14. mips support has been removed from the bsd-user fork because updating it for new signal requirements will take too much time. Remove it here since it is a distraction. Signed-off-by: Warner Losh <imp@bsdimp.com> Acked-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-05Merge tag 'pull-request-2022-01-05' of https://gitlab.com/thuth/qemu into ↵Richard Henderson19-84/+151
staging * Add compat machines for 7.0 * Some minor qtest and unit test improvements * Remove -no-quit option * Fixes for the docs # gpg: Signature made Wed 05 Jan 2022 02:10:49 AM PST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined] # gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-01-05' of https://gitlab.com/thuth/qemu: docs/tools/qemu-trace-stap.rst: Do not hard-code the QEMU binary name gitlab-ci: Enable docs in the centos job docs/sphinx: fix compatibility with sphinx < 1.8 qemu-options: Remove the deprecated -no-quit option tests/unit/test-util-sockets: Use g_file_open_tmp() to create temp file tests/qtest/hd-geo-test: Check for the lsi53c895a controller before using it tests/qtest/test-x86-cpuid-compat: Check for machines before using them hw: Add compat machines for 7.0 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-05docs/tools/qemu-trace-stap.rst: Do not hard-code the QEMU binary nameThomas Huth1-12/+12
In downstream, we want to use a different name for the QEMU binary, and some people might also use the docs for non-x86 binaries, that's why we already created the |qemu_system| placeholder in the past. Use it now in the stap trace doc, too. Message-Id: <20220104103319.179870-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-05gitlab-ci: Enable docs in the centos jobThomas Huth1-1/+1
We just ran into a problem that the docs don't build on RHEL8 / CentOS 8 anymore. Seems like these distros are using one of the oldest Sphinx versions that we still have to support. Thus enable the docs build in the CI on CentOS so that such bugs don't slip in so easily again. Message-Id: <20220104091240.160867-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-05docs/sphinx: fix compatibility with sphinx < 1.8Marc-André Lureau1-2/+2
SphinxDirective was added with sphinx 1.8 (2018-09-13). Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220104074649.1712440-1-marcandre.lureau@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-05qemu-options: Remove the deprecated -no-quit optionThomas Huth4-21/+8
This option was just a wrapper around the -display ...,window-close=off parameter, and the name "no-quit" is rather confusing compared to "window-close" (since there are still other means to quit the emulator), so let's remove this now. Message-Id: <20211215082417.180735-1-thuth@redhat.com> Acked-by: Michal Prívozník <mprivozn@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-05tests/unit/test-util-sockets: Use g_file_open_tmp() to create temp filePhilippe Mathieu-Daudé1-2/+4
Similarly to commit e63ed64c6d1 ("tests/qtest/virtio-net-failover: Use g_file_open_tmp() to create temporary file"), avoid calling g_test_rand_int() before g_test_init(): use g_file_open_tmp(). Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211224234504.3413370-1-philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-05tests/qtest/hd-geo-test: Check for the lsi53c895a controller before using itThomas Huth1-3/+5
The lsi53c895a SCSI controller might have been disabled in the target binary, so let's check for its availability first before using it. Message-Id: <20211222153600.976588-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-05tests/qtest/test-x86-cpuid-compat: Check for machines before using themThomas Huth1-37/+48
The user might have disabled the pc-i440fx machine type (or it's older versions, like done in downstream RHEL) in the QEMU binary, so let's better check whether the machine types are available before using them. Message-Id: <20211222153923.1000420-1-thuth@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-05hw: Add compat machines for 7.0Cornelia Huck9-6/+71
Add 7.0 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20211217143948.289995-1-cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-04common-user: Really fix i386 calls to safe_syscall_set_errno_tailRichard Henderson1-1/+1
Brown bag time: offset 0 from esp is the return address, offset 4 is the first argument. Fixes: d7478d4229f0 ("common-user: Fix tail calls to safe_syscall_set_errno_tail") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-04Merge tag 'pull-tcg-20220104' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson6-15/+42
Fix for safe_syscall_base. Fix for folding of vector add/sub. Fix build on loongarch64 with gcc 8. Remove decl for qemu_run_machine_init_done_notifiers. # gpg: Signature made Tue 04 Jan 2022 04:39:35 PM PST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20220104' of https://gitlab.com/rth7680/qemu: common-user: Fix tail calls to safe_syscall_set_errno_tail sysemu: Cleanup qemu_run_machine_init_done_notifiers() linux-user: Fix trivial build error on loongarch64 hosts tcg/optimize: Fix folding of vector ops Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-04common-user: Fix tail calls to safe_syscall_set_errno_tailRichard Henderson3-0/+3
For the ABIs in which the syscall return register is not also the first function argument register, move the errno value into the correct place. Fixes: a3310c0397e2 ("linux-user: Move syscall error detection into safe_syscall_base") Reported-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220104190454.542225-1-richard.henderson@linaro.org>
2022-01-04sysemu: Cleanup qemu_run_machine_init_done_notifiers()Xiaoyao Li1-1/+0
Remove qemu_run_machine_init_done_notifiers() since no implementation and user. Fixes: f66dc8737c9 ("vl: move all generic initialization out of vl.c") Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220104024136.1433545-1-xiaoyao.li@intel.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-04linux-user: Fix trivial build error on loongarch64 hostsPhilippe Mathieu-Daudé1-3/+1
When building using GCC 8.3.0 on loongarch64 (Loongnix) we get: In file included from ../linux-user/signal.c:33: ../linux-user/host/loongarch64/host-signal.h: In function ‘host_signal_write’: ../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only be part of a statement and a declaration is not a statement uint32_t sel = (insn >> 15) & 0b11111111111; ^~~~~~~~ We don't use the 'sel' variable more than once, so drop it. Meson output for the record: Host machine cpu family: loongarch64 Host machine cpu: loongarch64 C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix 8.3.0-6.lnd.vec.27) 8.3.0") C linker for the host machine: cc ld.bfd 2.31.1-system Fixes: ad812c3bd65 ("linux-user: Implement CPU-specific signal handler for loongarch64 hosts") Reported-by: Song Gao <gaosong@loongson.cn> Suggested-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220104215027.2180972-1-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-04tcg/optimize: Fix folding of vector opsRichard Henderson1-11/+38
Bitwise operations are easy to fold, because the operation is identical regardless of element size. But add and sub need extra element size info that is not currently propagated. Fixes: 2f9f08ba43d Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/799 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-04Merge tag 'pull-ppc-20220104' of https://github.com/legoater/qemu into stagingRichard Henderson30-446/+604
ppc 7.0 queue: * Cleanup of PowerNV PHBs (Daniel and Cedric) * Cleanup and fixes for PPC405 machine (Cedric) * Fix for xscvspdpn (Matheus) * Rework of powerpc exception handling 1/n (Fabiano) * Optimisation for PMU (Richard and Daniel) # gpg: Signature made Mon 03 Jan 2022 11:04:06 PM PST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20220104' of https://github.com/legoater/qemu: (26 commits) target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0() target/ppc: Use env->pnc_cyc_cnt target/ppc: Rewrite pmu_increment_insns target/ppc: Cache per-pmc insn and cycle count settings target/ppc: powerpc_excp: Stop passing excp_model around target/ppc: powerpc_excp: Move system call vectored code together target/ppc: powerpc_excp: Set vector earlier target/ppc: powerpc_excp: Add excp_vectors bounds check target/ppc: powerpc_excp: Set alternate SRRs directly target/ppc: do not silence snan in xscvspdpn ppc/ppc405: Dump specific registers ppc/ppc405: Introduce a store helper for SPR_40x_PID ppc/ppc405: Fix timer initialization ppc/ppc405: Rework ppc_40x_timers_init() to use a PowerPCCPU ppc/ppc405: Restore TCR and STR write handlers ppc/ppc405: Activate MMU logs ppc/ppc4xx: Convert printfs() target/ppc: Print out literal exception names in logs target/ppc: Remove static inline target/ppc: Check effective address validity ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-04target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0()Daniel Henrique Barboza1-1/+6
MMCR0 writes will change only MMCR0 bits which are used to calculate HFLAGS_PMCC0, HFLAGS_PMCC1 and HFLAGS_INSN_CNT hflags. No other machine register will be changed during this operation. This means that hreg_compute_hflags() is overkill for what we need to do. pmu_update_summaries() is already updating HFLAGS_INSN_CNT without calling hreg_compure_hflags(). Let's do the same for the other 2 MMCR0 hflags. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220103224746.167831-5-danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-01-04target/ppc: Use env->pnc_cyc_cntRichard Henderson1-98/+9
Use the cached pmc_cyc_cnt value in pmu_update_cycles and pmc_update_overflow_timer. This leaves pmc_get_event and pmc_is_inactive unused, so remove them. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220103224746.167831-4-danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-01-04target/ppc: Rewrite pmu_increment_insnsRichard Henderson1-29/+49
Use the cached pmc_ins_cnt value. Unroll the loop over the different PMC counters. Treat the PMC4 run-latch specially. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220103224746.167831-3-danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-01-04target/ppc: Cache per-pmc insn and cycle count settingsRichard Henderson6-20/+58
This is the combination of frozen bit and counter type, on a per counter basis. So far this is only used by HFLAGS_INSN_CNT, but will be used more later. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [danielhb: fixed PMC4 cyc_cnt shift, insn run latch code, MMCR0_FC handling, "PMC[1-6]" comment] Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220103224746.167831-2-danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-01-04target/ppc: powerpc_excp: Stop passing excp_model aroundFabiano Rosas1-22/+21
We can just access it directly in powerpc_excp. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ clg: Took into account removal of inline ] Message-Id: <20211229165751.3774248-6-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-01-04target/ppc: powerpc_excp: Move system call vectored code togetherFabiano Rosas1-8/+5
Now that 'vector' is known before calling the interrupt-specific setup code, we can move all of the scv setup into one place. No functional change intended. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211229165751.3774248-5-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-01-04target/ppc: powerpc_excp: Set vector earlierFabiano Rosas1-8/+8
None of the interrupt setup code touches 'vector', so we can move it earlier in the function. This will allow us to later move the System Call Vectored setup that is on the top level into the POWERPC_EXCP_SYSCALL_VECTORED code block. This patch also moves the verification for when 'excp' does not have an address associated with it. We now bail a little earlier when that is the case. This should not cause any visible effects. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20211229165751.3774248-4-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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