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2022-12-21hw/ppc/spapr: Reduce "vof.h" inclusionPhilippe Mathieu-Daudé2-1/+3
Currently objects including "hw/ppc/spapr.h" are forced to be target specific due to the inclusion of "vof.h" in "spapr.h". "spapr.h" only uses a Vof pointer, so doesn't require the structure declaration. The only place where Vof structure is accessed is in spapr.c, so include "vof.h" there, and forward declare the structure in "spapr.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221213123550.39302-4-philmd@linaro.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-12-21hw/ppc/vof: Do not include the full "cpu.h"Philippe Mathieu-Daudé1-1/+1
"vof.h" doesn't need the full "cpu.h" to get the target_ulong definition, including "exec/cpu-defs.h" is enough. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221213123550.39302-3-philmd@linaro.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-12-21target/ppc/kvm: Add missing "cpu.h" and "exec/hwaddr.h"Philippe Mathieu-Daudé1-0/+3
kvm_ppc.h is missing various declarations from "cpu.h": target/ppc/kvm_ppc.h:128:40: error: unknown type name 'CPUPPCState'; did you mean 'CPUState'? static inline int kvmppc_get_hypercall(CPUPPCState *env, ^~~~~~~~~~~ CPUState include/qemu/typedefs.h:45:25: note: 'CPUState' declared here typedef struct CPUState CPUState; ^ target/ppc/kvm_ppc.h:134:40: error: unknown type name 'PowerPCCPU' static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level) ^ target/ppc/kvm_ppc.h:285:38: error: unknown type name 'hwaddr' hwaddr ptex, int n) ^ target/ppc/kvm_ppc.h:220:15: error: unknown type name 'target_ulong' static inline target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu, ^ target/ppc/kvm_ppc.h:286:38: error: unknown type name 'ppc_hash_pte64_t' static inline void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221213123550.39302-2-philmd@linaro.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-12-21hw/ppc/e500: Add Freescale eSDHC to e500platPhilippe Mathieu-Daudé5-1/+64
Adds missing functionality to e500plat machine which increases the chance of given "real" firmware images to access SD cards. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20221018210146.193159-8-shentey@gmail.com> [PMD: Simplify using create_unimplemented_device("esdhc")] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20221101222934.52444-4-philmd@linaro.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-12-21hw/sd/sdhci: Support big endian SD host controller interfacesPhilippe Mathieu-Daudé3-3/+31
Some SDHCI IP can be synthetized in various endianness: https://github.com/u-boot/u-boot/blob/v2021.04/doc/README.fsl-esdhc - CONFIG_SYS_FSL_ESDHC_BE ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined by ESDHC IP's endian mode or processor's endian mode. Our current implementation is little-endian. In order to support big endianness: - Rename current MemoryRegionOps as sdhci_mmio_le_ops ('le') - Add an 'endianness' property to SDHCIState (default little endian) - Set the 'io_ops' field in realize() after checking the property - Add the sdhci_mmio_be_ops (big-endian) MemoryRegionOps. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20221101222934.52444-3-philmd@linaro.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-12-21MAINTAINERS: downgrade PPC KVM/TCG CPUs and pSeries to 'Odd Fixes'Daniel Henrique Barboza1-3/+3
The maintainer is no longer being paid to maintain these components. All maintainership work is being done in his personal time since the middle of the 7.2 development cycle. Change the status of PPC KVM CPUs, PPC TCG CPUs and the pSeries machine to 'Odd Fixes', reflecting that the maintainer no longer has exclusive time to dedicate to them. It'll also (hopefully) keep expectations under check when/if these components are used in a customer product. Cc: Cédric Le Goater <clg@kaod.org> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Greg Kurz <groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20221117153218.182835-1-danielhb413@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-12-21Merge tag 'pull-tcg-20221220' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell15-1161/+2661
Use interval trees for user-only vma mappings. Assorted cleanups to page locking. # gpg: Signature made Wed 21 Dec 2022 05:00:30 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20221220' of https://gitlab.com/rth7680/qemu: accel/tcg: Restrict page_collection structure to system TB maintainance accel/tcg: Factor tb_invalidate_phys_range_fast() out accel/tcg: Rename tb_invalidate_phys_page_fast{,__locked}() accel/tcg: Remove trace events from trace-root.h accel/tcg: Restrict cpu_io_recompile() to system emulation accel/tcg: Move remainder of page locking to tb-maint.c accel/tcg: Move PageDesc tree into tb-maint.c for system accel/tcg: Use interval tree for user-only page tracking accel/tcg: Move page_{get,set}_flags to user-exec.c accel/tcg: Drop PAGE_RESERVED for CONFIG_BSD accel/tcg: Use interval tree for TARGET_PAGE_DATA_SIZE accel/tcg: Use interval tree for TBs in user-only mode accel/tcg: Rename page_flush_tb util: Add interval-tree.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-12-21block/io: Check for replay-enabled in bdrv_drain_all_begin()Peter Maydell1-0/+9
In commit da0bd74434 we refactored bdrv_drain_all_begin() to pull out the non-polling part into bdrv_drain_all_begin_nopoll(). This change broke record-and-replay, because the "return early if replay enabled" check is now in the sub-function bdrv_drain_all_begin_nopoll(), and so it only causes us to return from that function, and not from the calling bdrv_drain_all_begin(). Fix the regression by checking whether replay is enabled in both functions. The breakage and fix can be tested via 'make check-avocado': the tests/avocado/reverse_debugging.py:ReverseDebugging_X86_64.test_x86_64_pc tests/avocado/reverse_debugging.py:ReverseDebugging_AArch64.test_aarch64_virt tests were both broken by this. Fixes: da0bd744344adb1f285 ("block: Factor out bdrv_drain_all_begin_nopoll()") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Fabiano Rosas <farosas@suse.de> Message-id: 20221220174638.2156308-1-peter.maydell@linaro.org
2022-12-20accel/tcg: Restrict page_collection structure to system TB maintainancePhilippe Mathieu-Daudé2-15/+7
Only the system emulation part of TB maintainance uses the page_collection structure. Restrict its declaration (and the functions requiring it) to tb-maint.c. Convert the 'len' argument of tb_invalidate_phys_page_fast__locked() from signed to unsigned. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221209093649.43738-6-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Factor tb_invalidate_phys_range_fast() outPhilippe Mathieu-Daudé3-8/+21
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221209093649.43738-5-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Rename tb_invalidate_phys_page_fast{,__locked}()Philippe Mathieu-Daudé3-7/+7
Emphasize this function is called with pages locked. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221209093649.43738-4-philmd@linaro.org> [rth: Use "__locked" suffix, to match other instances.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Remove trace events from trace-root.hPhilippe Mathieu-Daudé3-5/+5
Commit d9bb58e510 ("tcg: move tcg related files into accel/tcg/ subdirectory") introduced accel/tcg/trace-events, so we don't need to use the root trace-events anymore. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221209093649.43738-3-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Restrict cpu_io_recompile() to system emulationPhilippe Mathieu-Daudé1-1/+1
Missed in commit 6526919224 ("accel/tcg: Restrict cpu_io_recompile() from other accelerators"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221209093649.43738-2-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Move remainder of page locking to tb-maint.cRichard Henderson4-434/+408
The only thing that still touches PageDesc in translate-all.c are some locking routines related to tb-maint.c which have not yet been moved. Do so now. Move some code up in tb-maint.c as well, to untangle the maze of ifdefs, and allow a sensible final ordering. Move some declarations from exec/translate-all.h to internal.h, as they are only used within accel/tcg/. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Move PageDesc tree into tb-maint.c for systemRichard Henderson3-140/+124
Now that PageDesc is not used for user-only, and for system it is only used for tb maintenance, move the implementation into tb-main.c appropriately ifdefed. We have not yet eliminated all references to PageDesc for user-only, so retain a typedef to the structure without definition. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Use interval tree for user-only page trackingRichard Henderson4-209/+450
Finish weaning user-only away from PageDesc. Using an interval tree to track page permissions means that we can represent very large regions efficiently. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/290 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/967 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1214 Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Move page_{get,set}_flags to user-exec.cRichard Henderson3-350/+363
This page tracking implementation is specific to user-only, since the system softmmu version is in cputlb.c. Move it out of translate-all.c to user-exec.c. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Drop PAGE_RESERVED for CONFIG_BSDRichard Henderson1-65/+0
Make bsd-user match linux-user in not marking host pages as reserved. This isn't especially effective anyway, as it doesn't take into account any heap memory that qemu may allocate after startup. Reviewed-by: Warner Losh <imp@bsdimp.com> Tested-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Use interval tree for TARGET_PAGE_DATA_SIZERichard Henderson2-27/+75
Continue weaning user-only away from PageDesc. Use an interval tree to record target data. Chunk the data, to minimize allocation overhead. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Use interval tree for TBs in user-only modeRichard Henderson4-171/+279
Begin weaning user-only away from PageDesc. Since, for user-only, all TB (and page) manipulation is done with a single mutex, and there is no virtual/physical discontinuity to split a TB across discontinuous pages, place all of the TBs into a single IntervalTree. This makes it trivial to find all of the TBs intersecting a range. Retain the existing PageDesc + linked list implementation for system mode. Move the portion of the implementation that overlaps the new user-only code behind the common ifdef. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20accel/tcg: Rename page_flush_tbRichard Henderson1-5/+5
Rename to tb_remove_all, to remove the PageDesc "page" from the name, and to avoid suggesting a "flush" in the icache sense. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20util: Add interval-tree.cRichard Henderson5-0/+1192
Copy and simplify the Linux kernel's interval_tree_generic.h, instantiating for uint64_t. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-20Merge tag 'qga-pull-2022-12-20' of github.com:kostyanf14/qemu into stagingPeter Maydell9-25/+133
qga-pull-2022-12-20 # gpg: Signature made Tue 20 Dec 2022 13:57:59 GMT # gpg: using RSA key C2C2C109EA43C63C1423EB84EF5D5E8161BA84E7 # gpg: Good signature from "Kostiantyn Kostiuk (Upstream PR sign) <kkostiuk@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: C2C2 C109 EA43 C63C 1423 EB84 EF5D 5E81 61BA 84E7 * tag 'qga-pull-2022-12-20' of github.com:kostyanf14/qemu: qga-win: choose the right libpcre version to include in MSI package qga: map GLib log levels to system levels qga-win: add logging to Windows event log qga: Add initial OpenBSD and NetBSD support qga:/qga-win: skip getting pci info for USB disks qga:/qga-win: adding a empty PCI address creation function Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-12-20Merge tag 'hppa-fixes-pull-request' of https://github.com/hdeller/qemu-hppa ↵Peter Maydell2-6/+22
into staging target/hppa patches # gpg: Signature made Mon 19 Dec 2022 22:27:31 GMT # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'hppa-fixes-pull-request' of https://github.com/hdeller/qemu-hppa: target/hppa: Fix fid instruction emulation target/hppa: Generate illegal instruction exception for 64-bit instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-12-20qga-win: choose the right libpcre version to include in MSI packageAndrey Drobyshev2-3/+15
According to GLib changelog [1], since version 2.73.2 GLib is using libpcre2 instead of libpcre. As a result, qemu-ga MSI installation fails due to missing DLL when linked with the newer GLib. This commit makes wixl to put the right libpcre version into the MSI bundle: either libpcre-1.dll or libpcre2-8-0.dll, depending on the present version of GLib. [1] https://gitlab.gnome.org/GNOME/glib/-/releases#2.73.2 Previous version: https://lists.nongnu.org/archive/html/qemu-trivial/2022-11/msg00237.html Signed-off-by: Andrey Drobyshev <andrey.drobyshev@virtuozzo.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Tested-by: Konstantin Kostiuk <kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-12-20qga: map GLib log levels to system levelsAndrey Drobyshev1-2/+34
This patch translates GLib-specific log levels to system ones, so that they may be used by both *nix syslog() (as a "priority" argument) and Windows ReportEvent() (as a "wType" argument). Currently the only codepath to write to "syslog" domain is slog() function. However, this patch allows the interface to be extended. Note that since slog() is using G_LOG_LEVEL_INFO level, its behaviour doesn't change. Originally-by: Yuri Pudgorodskiy <yur@virtuozzo.com> Signed-off-by: Andrey Drobyshev <andrey.drobyshev@virtuozzo.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Tested-by: Konstantin Kostiuk <kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-12-20qga-win: add logging to Windows event logAndrey Drobyshev5-4/+48
This commit allows QGA to write to Windows event log using Win32 API's ReportEvent() [1], much like syslog() under *nix guests. In order to generate log message definitions we use a very basic message text file [2], so that every QGA's message gets ID 1. The tools "windmc" and "windres" respectively are used to generate ".rc" file and COFF object file, and then the COFF file is linked into qemu-ga.exe. [1] https://learn.microsoft.com/en-us/windows/win32/api/winbase/nf-winbase-reporteventa [2] https://learn.microsoft.com/en-us/windows/win32/eventlog/message-text-files Originally-by: Yuri Pudgorodskiy <yur@virtuozzo.com> Signed-off-by: Andrey Drobyshev <andrey.drobyshev@virtuozzo.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Tested-by: Konstantin Kostiuk <kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-12-20qga: Add initial OpenBSD and NetBSD supportBrad Smith4-6/+16
qga: Add initial OpenBSD and NetBSD support Signed-off-by: Brad Smith <brad@comstyle.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-12-20qga:/qga-win: skip getting pci info for USB disksKfir Manor1-4/+8
Skip getting PCI info from disks type USB and give them an empty PCI address instead. Signed-off-by: Kfir Manor <kfir@daynix.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-12-20qga:/qga-win: adding a empty PCI address creation functionKfir Manor1-7/+13
Refactoring code to avoid duplication of creating an empty PCI address code. Signed-off-by: Kfir Manor <kfir@daynix.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-12-19target/hppa: Fix fid instruction emulationHelge Deller2-4/+12
The fid instruction (Floating-Point Identify) puts the FPU model and revision into the Status Register. Since those values shouldn't be 0, store values there which a PCX-L2 (for 32-bit) or a PCX-W2 (for 64-bit) would return. Noticed while trying to install MPE/iX. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-19target/hppa: Generate illegal instruction exception for 64-bit instructionsHelge Deller1-2/+10
Qemu currently emulates a 32-bit CPU only, and crashes with this error when it faces a 64-bit load (e.g. "ldd 0(r26),r0") or a 64-bit store (e.g. "std r26,0(r26)") instruction in the guest: ERROR:../qemu/tcg/tcg-op.c:2822:tcg_canonicalize_memop: code should not be reached Add checks for 64-bit sizes and generate an illegal instruction exception if necessary. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-19Merge tag 'pull-monitor-2022-12-19' of https://repo.or.cz/qemu/armbru into ↵Peter Maydell10-443/+478
staging Monitor patches for 2022-12-19 # gpg: Signature made Mon 19 Dec 2022 15:23:44 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-monitor-2022-12-19' of https://repo.or.cz/qemu/armbru: pci: Reject pcie_aer_inject_error -c with symbolic error status pci: Improve do_pcie_aer_inject_error()'s error messages pci: Rename hmp_pcie_aer_inject_error()'s local variable @err pci: Inline do_pcie_aer_inject_error() into its only caller pci: Move HMP command from hw/pci/pcie_aer.c to pci-hmp-cmds.c pci: Fix silent truncation of pcie_aer_inject_error argument pci: Move pcibus_dev_print() to pci-hmp-cmds.c pci: Deduplicate get_class_desc() pci: Build hw/pci/pci-hmp-cmds.c only when CONFIG_PCI pci: Make query-pci stub consistent with the real one pci: Move HMP commands from monitor/ to new hw/pci/pci-hmp-cmds.c pci: Move QMP commands to new hw/pci/pci-qmp-cmds.c pci: Clean up a few things checkpatch.pl would flag later on Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-12-19pci: Reject pcie_aer_inject_error -c with symbolic error statusMarkus Armbruster1-0/+5
When argument @error_status is symbolic, flag -c is ignored. Reject it instead. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20221201121133.3813857-14-armbru@redhat.com>
2022-12-19pci: Improve do_pcie_aer_inject_error()'s error messagesMarkus Armbruster1-15/+15
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20221201121133.3813857-13-armbru@redhat.com>
2022-12-19pci: Rename hmp_pcie_aer_inject_error()'s local variable @errMarkus Armbruster1-17/+17
I'd like to use @err for an Error *err. Rename PCIEAERErr err to aer_err. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221201121133.3813857-12-armbru@redhat.com>
2022-12-19pci: Inline do_pcie_aer_inject_error() into its only callerMarkus Armbruster1-35/+6
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20221201121133.3813857-11-armbru@redhat.com>
2022-12-19pci: Move HMP command from hw/pci/pcie_aer.c to pci-hmp-cmds.cMarkus Armbruster6-114/+113
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221201121133.3813857-10-armbru@redhat.com>
2022-12-19pci: Fix silent truncation of pcie_aer_inject_error argumentMarkus Armbruster1-4/+5
PCI AER error status is 32 bit. The HMP command supports both symbolic and numeric error status: anything that isn't a known symbolic value is parsed as number with strtol(). Issues: * Empty argument yields value zero. * Range errors from strtol() are ignored, value is UINT32_MAX. * Values not representable in uint32_t are silently truncated. Fix to reject such input by switching to strtoui(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20221201121133.3813857-9-armbru@redhat.com>
2022-12-19pci: Move pcibus_dev_print() to pci-hmp-cmds.cMarkus Armbruster3-38/+39
This method is for HMP command "info qtree". Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221201121133.3813857-8-armbru@redhat.com>
2022-12-19pci: Deduplicate get_class_desc()Markus Armbruster1-6/+3
pcibus_dev_print() contains a copy of get_class_desc(). Call the function instead. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20221201121133.3813857-7-armbru@redhat.com>
2022-12-19pci: Build hw/pci/pci-hmp-cmds.c only when CONFIG_PCIMarkus Armbruster2-1/+6
We compile pci-hmp-cmds.c always, but pci-qmp-cmds.c only when CONFIG_PCI. hw/pci/pci-stub.c keeps the linker happy when !CONFIG_PCI. Build pci-hmp-cmds.c that way, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20221201121133.3813857-6-armbru@redhat.com>
2022-12-19pci: Make query-pci stub consistent with the real oneMarkus Armbruster2-10/+1
QMP query-pci and HMP info pci can behave differently when there are no PCI devices. They can report nothing, like this: qemu-system-aarch64 -S -M spitz -display none -monitor stdio QEMU 7.1.91 monitor - type 'help' for more information (qemu) info pci Or they can fail, like this: qemu-system-microblaze -M petalogix-s3adsp1800 -display none -monitor stdio QEMU 7.1.91 monitor - type 'help' for more information (qemu) info pci PCI devices not supported They fail when none of the target's machines supports PCI, i.e. when we're using qmp_query_pci() from hw/pci/pci-stub.c. The error is not useful, and reporting nothing makes sense, so do that in pci-stub.c, too. Now qmp_query_pci() can't fail anymore. Drop the dead error handling from hmp_info_pci(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20221201121133.3813857-5-armbru@redhat.com>
2022-12-19pci: Move HMP commands from monitor/ to new hw/pci/pci-hmp-cmds.cMarkus Armbruster3-107/+127
This moves these commands from MAINTAINERS section "Human Monitor (HMP)" to "PCI". Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20221201121133.3813857-4-armbru@redhat.com>
2022-12-19pci: Move QMP commands to new hw/pci/pci-qmp-cmds.cMarkus Armbruster4-182/+224
This moves these commands from MAINTAINERS section "QMP" to "PCI". Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20221201121133.3813857-3-armbru@redhat.com> [Commit message improved]
2022-12-19pci: Clean up a few things checkpatch.pl would flag later onMarkus Armbruster1-3/+6
Fix a few style violations so that checkpatch.pl won't complain when I move this code. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221201121133.3813857-2-armbru@redhat.com>
2022-12-19Merge tag 'pull-misc-20221218' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell2-2/+2
Fix tricore gdbstub. Fix superh_cpu_synchronize_from_tb. # gpg: Signature made Sun 18 Dec 2022 17:48:54 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-misc-20221218' of https://gitlab.com/rth7680/qemu: target/tricore: Fix gdbstub write to address registers target/sh4: Mask restore of env->flags from tb->flags Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-12-18target/tricore: Fix gdbstub write to address registersRichard Henderson1-1/+1
Typo had double-writes to data registers. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1363 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-18target/sh4: Mask restore of env->flags from tb->flagsGuenter Roeck1-1/+1
The values in env->flags are a subset of tb->flags. Restore only the bits that belong. Cc: qemu-stable@nongnu.org Fixes: ab419fd8a035 ("target/sh4: Fix TB_FLAG_UNALIGN") Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-ID: <20221212011345.GA2235238@roeck-us.net> [rth: Reduce to only the the superh_cpu_synchronize_from_tb change] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-12-18Merge tag 'pull-hex-20221216-1' of https://github.com/quic/qemu into stagingPeter Maydell59-210/+7908
1) Performance improvement Add pkt and insn to DisasContext Many functions need information from all 3 structures, so merge them together. 2) Bug fix Fix predicated assignment to .tmp and .cur 3) Performance improvement Add overrides for S2_asr_r_r_sat/S2_asl_r_r_sat These functions will not be handled by idef-parser 4-11) The final 8 patches improve change-of-flow handling. Currently, we set the PC to a new address before exiting a TB. The ultimate goal is to use direct block chaining. However, several steps are needed along the way. 4) When a packet has more than one change-of-flow (COF) instruction, only the first one taken is considered. The runtime bookkeeping is only needed when there is more than one COF instruction in a packet. 5, 6) Remove PC and next_PC from the runtime state and always use a translation-time constant. Note that next_PC is used by call instructions to set LR and by conditional COF instructions to set the fall-through address. 7, 8, 9) Add helper overrides for COF instructions. In particular, we must distinguish those that use a PC-relative address for the destination. These are candidates for direct block chaining later. 10) Use direct block chaining for packets that have a single PC-relative COF instruction. Instead of generating the code while processing the instruction, we record the effect in DisasContext and generate the code during gen_end_tb. 11) Use direct block chaining for tight loops. We look for TBs that end with an endloop0 that will branch back to the TB start address. 12-21) Instruction definition parser (idef-parser) from rev.ng Parses the instruction semantics and generates TCG # gpg: Signature made Fri 16 Dec 2022 20:41:53 GMT # gpg: using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422 # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422 * tag 'pull-hex-20221216-1' of https://github.com/quic/qemu: (21 commits) target/hexagon: import additional tests target/hexagon: call idef-parser functions target/hexagon: import parser for idef-parser target/hexagon: import lexer for idef-parser target/hexagon: prepare input for the idef-parser target/hexagon: introduce new helper functions target/hexagon: make helper functions non-static target/hexagon: make slot number an unsigned target/hexagon: import README for idef-parser target/hexagon: update MAINTAINERS for idef-parser Hexagon (target/hexagon) Use direct block chaining for tight loops Hexagon (target/hexagon) Use direct block chaining for direct jump/branch Hexagon (target/hexagon) Add overrides for various forms of jump Hexagon (target/hexagon) Add overrides for compound compare and jump Hexagon (target/hexagon) Add overrides for direct call instructions Hexagon (target/hexagon) Remove next_PC from runtime state Hexagon (target/hexagon) Remove PC from the runtime state Hexagon (target/hexagon) Only use branch_taken when packet has multi cof Hexagon (target/hexagon) Add overrides for S2_asr_r_r_sat/S2_asl_r_r_sat Hexagon (target/hexagon) Fix predicated assignment to .tmp and .cur ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2025-01-28 09:26:27 +0000