Age | Commit message (Expand) | Author | Files | Lines |
2017-09-07 | tcg/arm: Code rearrangement | Richard Henderson | 1 | -258/+257 |
2017-09-07 | tcg/arm: Tighten tlb indexing offset test | Richard Henderson | 1 | -1/+3 |
2017-09-07 | tcg/arm: Improve tlb load for armv7 | Richard Henderson | 1 | -20/+52 |
2017-09-07 | tcg/sparc: Use constant pool for movi | Richard Henderson | 2 | -21/+58 |
2017-09-07 | tcg/sparc: Introduce TCG_REG_TB | Richard Henderson | 1 | -30/+140 |
2017-09-07 | tcg/aarch64: Use constant pool for movi | Richard Henderson | 2 | -30/+33 |
2017-09-07 | tcg/s390: Use constant pool for cmpi | Richard Henderson | 1 | -69/+67 |
2017-09-07 | tcg/s390: Use constant pool for xori | Richard Henderson | 1 | -37/+40 |
2017-09-07 | tcg/s390: Use constant pool for ori | Richard Henderson | 1 | -40/+34 |
2017-09-07 | tcg/s390: Use constant pool for andi | Richard Henderson | 1 | -6/+14 |
2017-09-07 | tcg/s390: Use constant pool for movi | Richard Henderson | 3 | -54/+80 |
2017-09-07 | tcg/s390: Fix sign of patch_reloc addend | Richard Henderson | 1 | -12/+13 |
2017-09-07 | tcg/s390: Introduce TCG_REG_TB | Richard Henderson | 2 | -12/+61 |
2017-09-07 | tcg/i386: Store out-of-range call targets in constant pool | Richard Henderson | 2 | -3/+16 |
2017-09-07 | tcg: Infrastructure for managing constant pools | Richard Henderson | 4 | -1/+119 |
2017-09-07 | tcg: Rearrange ldst label tracking | Richard Henderson | 19 | -91/+57 |
2017-09-07 | tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h | Richard Henderson | 16 | -116/+106 |
2017-09-07 | tcg/tci: Add TCG_TARGET_DEFAULT_MO | Richard Henderson | 1 | -0/+5 |
2017-09-07 | Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2017-09-06' into st... | Peter Maydell | 10 | -111/+141 |
2017-09-07 | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170907'... | Peter Maydell | 48 | -213/+978 |
2017-09-07 | Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20170906a'... | Peter Maydell | 9 | -85/+35 |
2017-09-07 | Merge remote-tracking branch 'remotes/rth/tags/pull-tgt-20170906' into staging | Peter Maydell | 17 | -570/+909 |
2017-09-07 | target/arm: Add Jazelle feature | Portia Stephens | 3 | -1/+5 |
2017-09-07 | target/arm: Implement new do_transaction_failed hook | Peter Maydell | 3 | -0/+54 |
2017-09-07 | hw/arm: Set ignore_memory_transaction_failures for most ARM boards | Peter Maydell | 27 | -0/+43 |
2017-09-07 | boards.h: Define new flag ignore_memory_transaction_failures | Peter Maydell | 3 | -1/+33 |
2017-09-07 | target/arm: Implement BXNS, and banked stack pointers | Peter Maydell | 6 | -1/+138 |
2017-09-07 | target/arm: Move regime_is_secure() to target/arm/internals.h | Peter Maydell | 2 | -26/+26 |
2017-09-07 | target/arm: Make CFSR register banked for v8M | Peter Maydell | 4 | -13/+30 |
2017-09-07 | target/arm: Make MMFAR banked for v8M | Peter Maydell | 4 | -6/+7 |
2017-09-07 | target/arm: Make CCR register banked for v8M | Peter Maydell | 5 | -13/+42 |
2017-09-07 | target/arm: Make MPU_CTRL register banked for v8M | Peter Maydell | 4 | -8/+11 |
2017-09-07 | target/arm: Make MPU_RNR register banked for v8M | Peter Maydell | 5 | -16/+26 |
2017-09-07 | target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M | Peter Maydell | 5 | -21/+40 |
2017-09-07 | target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8M | Peter Maydell | 4 | -10/+14 |
2017-09-07 | target/arm: Make VTOR register banked for v8M | Peter Maydell | 4 | -9/+11 |
2017-09-07 | nvic: Add NS alias SCS region | Peter Maydell | 2 | -1/+66 |
2017-09-07 | target/arm: Make CONTROL register banked for v8M | Peter Maydell | 4 | -14/+17 |
2017-09-07 | target/arm: Make FAULTMASK register banked for v8M | Peter Maydell | 4 | -9/+39 |
2017-09-07 | target/arm: Make PRIMASK register banked for v8M | Peter Maydell | 4 | -6/+11 |
2017-09-07 | target/arm: Make BASEPRI register banked for v8M | Peter Maydell | 4 | -8/+23 |
2017-09-07 | target/arm: Add MMU indexes for secure v8M | Peter Maydell | 2 | -3/+25 |
2017-09-07 | target/arm: Register second AddressSpace for secure v8M CPUs | Peter Maydell | 1 | -7/+6 |
2017-09-07 | target/arm: Add state field, feature bit and migration for v8M secure state | Peter Maydell | 4 | -1/+34 |
2017-09-07 | target/arm: Implement new PMSAv8 behaviour | Peter Maydell | 1 | -1/+110 |
2017-09-07 | target/arm: Implement ARMv8M's PMSAv8 registers | Peter Maydell | 4 | -20/+180 |
2017-09-07 | hw/arm/allwinner-a10: Mark the allwinner-a10 device with user_creatable = false | Thomas Huth | 2 | -1/+2 |
2017-09-07 | xilinx_axidma: Convert to DEFINE_PROP_LINK | Fam Zheng | 1 | -12/+4 |
2017-09-07 | xilinx_axienet: Convert to DEFINE_PROP_LINK | Fam Zheng | 1 | -12/+4 |
2017-09-07 | xlnx_zynqmp: Convert to DEFINE_PROP_LINK | Fam Zheng | 1 | -5/+2 |