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2021-07-09hw/intc: Improve formatting of MEMTX_ERROR guest error messageRebecca Cran1-2/+2
Add a space in the message printed when gicr_read*/gicr_write* returns MEMTX_ERROR in arm_gicv3_redist.c. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210706211432.31902-1-rebecca@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRinthnick@vmware.com1-3/+13
Signed-off-by: Nick Hudson <hnick@vmware.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09hw/arm/stellaris: Expand comment about handling of OLED chipselectPeter Maydell1-1/+55
The stellaris board doesn't emulate the handling of the OLED chipselect line correctly. Expand the comment describing this, including a sketch of the theoretical correct way to do it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09hw/gpio/pl061: Document a shortcoming in our implementationPeter Maydell1-0/+9
The Luminary PL061s in the Stellaris LM3S9695 don't all have the same reset value for GPIOPUR. We can get away with not letting the board configure the PUR reset value because we don't actually wire anything up to the lines which should reset to pull-up. Add a comment noting this omission. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-07-09hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on resetPeter Maydell2-4/+26
The PL061 comes out of reset with all its lines configured as input, which means they might need to be pulled to 0 or 1 depending on the 'pullups' and 'pulldowns' properties. Currently we do not assert these lines on reset; they will only be set whenever the guest first touches a register that triggers a call to pl061_update(). Convert the device to three-phase reset so we have a place where we can safely call qemu_set_irq() to set the floating lines to their correct values. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09hw/arm/virt: Make PL061 GPIO lines pulled low, not highPeter Maydell1-0/+3
For the virt board we have two PL061 devices -- one for NonSecure which is inputs only, and one for Secure which is outputs only. For the former, we don't care whether its outputs are pulled low or high when the line is configured as an input, because we don't connect them. For the latter, we do care, because we wire the lines up to the gpio-pwr device, which assumes that level 1 means "do the action" and 1 means "do nothing". For consistency in case we add more outputs in future, configure both PL061s to pull GPIO lines down to 0. Reported-by: Maxim Uvarov <maxim.uvarov@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09hw/gpio/pl061: Make pullup/pulldown of outputs configurablePeter Maydell1-4/+47
The PL061 GPIO does not itself include pullup or pulldown resistors to set the value of a GPIO line treated as an output when it is configured as an input (ie when the PL061 itself is not driving it). In real hardware it is up to the board to add suitable pullups or pulldowns. Currently our implementation hardwires this to "outputs pulled high", which is correct for some boards (eg the realview ones: see figure 3-29 in the "RealView Platform Baseboard for ARM926EJ-S User Guide" DUI0224I), but wrong for others. In particular, the wiring in the 'virt' board and the gpio-pwr device assumes that wires should be pulled low, because otherwise the pull-to-high will trigger a shutdown or reset action. (The only reason this doesn't happen immediately on startup is due to another bug in the PL061, where we don't assert the GPIOs to the correct value on reset, but will do so as soon as the guest touches a register and pl061_update() gets called.) Add properties to the pl061 so the board can configure whether it wants GPIO lines to have pullup, pulldown, or neither. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registersPeter Maydell2-7/+57
The Luminary variant of the PL061 has registers GPIOPUR and GPIOPDR which lets the guest configure whether the GPIO lines are pull-up, pull-down, or truly floating. Instead of assuming all lines are pulled high, honour the PUR and PDR registers. For the plain PL061, continue to assume that lines have an external pull-up resistor, as we did before. The stellaris board actually relies on this behaviour -- the CD line of the ssd0323 display device is connected to GPIO output C7, and it is only because of a different bug which we're about to fix that we weren't incorrectly driving this line high on reset and putting the ssd0323 into data mode. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09hw/gpio/pl061: Document the interface of this devicePeter Maydell1-0/+7
Add a comment documenting the "QEMU interface" of this device: which MMIO regions, IRQ lines, GPIO lines, etc it exposes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09hw/gpio/pl061: Add tracepoints for register read and writePeter Maydell2-22/+50
Add tracepoints for reads and writes to the PL061 registers. This requires restructuring pl061_read() to only return after the tracepoint, rather than having lots of early-returns. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09hw/gpio/pl061: Clean up read/write offset handling logicPeter Maydell1-25/+79
Currently the pl061_read() and pl061_write() functions handle offsets using a combination of three if() statements and a switch(). Clean this up to use just a switch, using case ranges. This requires that instead of catching accesses to the luminary-only registers on a stock PL061 via a check on s->rsvd_start we use an "is this luminary?" check in the cases for each luminary-only register. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09hw/gpio/pl061: Convert DPRINTF to tracepointsPeter Maydell2-18/+15
Convert the use of the DPRINTF debug macro in the PL061 model to use tracepoints. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-09hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_writeRicardo Koller1-2/+2
icv_eoir_write() and icv_dir_write() ignore invalid virtual IRQ numbers (like LPIs). The issue is that these functions check against the number of implemented IRQs (QEMU's default is num_irq=288) which can be lower than the maximum virtual IRQ number (1020 - 1). The consequence is that if a hypervisor creates an LR for an IRQ between 288 and 1020, then the guest is unable to deactivate the resulting IRQ. Note that other functions that deal with large IRQ numbers, like icv_iar_read, check against 1020 and not against num_irq. Fix the checks by using GICV3_MAXIRQ (1020) instead of the number of implemented IRQs. Signed-off-by: Ricardo Koller <ricarkol@google.com> Message-id: 20210702233701.3369-1-ricarkol@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09tests/boot-serial-test: Add STM32VLDISCOVERY board testcaseAlexandre Iooss1-0/+37
New mini-kernel test for STM32VLDISCOVERY USART1. Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Acked-by: Thomas Huth <thuth@redhat.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210617165647.2575955-5-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09docs/system: arm: Add stm32 boards descriptionAlexandre Iooss3-0/+68
This adds the target guide for Netduino 2, Netduino Plus 2 and STM32VLDISCOVERY. Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210617165647.2575955-4-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09stm32vldiscovery: Add the STM32VLDISCOVERY MachineAlexandre Iooss5-0/+78
This is a Cortex-M3 based machine. Information can be found at: https://www.st.com/en/evaluation-tools/stm32vldiscovery.html Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210617165647.2575955-3-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09stm32f100: Add the stm32f100 SoCAlexandre Iooss5-0/+252
This SoC is similar to stm32f205 SoC. This will be used by the STM32VLDISCOVERY to create a machine. Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210617165647.2575955-2-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell22-8/+115
pc,pci,virtio: bugfixes, improvements vhost-user-rng support. Fixes all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 07 Jul 2021 14:29:30 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: MAINTAINERS: Add maintainer for vhost-user RNG implementation docs: add slot when adding new PCIe root port acpi/ged: fix reset cause tests: acpi: pc: update expected DSDT blobs acpi: pc: revert back to v5.2 PCI slot enumeration tests: acpi: prepare for changing DSDT tables migration: failover: reset partially_hotplugged virtio-pci: Changed return values for "notify", "device" and "isr" read. virtio-pci: Added check for virtio device in PCI config cbs. virtio-pci: Added check for virtio device presence in mm callbacks. hw/pci-host/q35: Ignore write of reserved PCIEXBAR LENGTH field virtio: Clarify MR transaction optimization virtio: disable ioeventfd for record/replay Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-08Merge remote-tracking branch ↵Peter Maydell10-17/+161
'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request # gpg: Signature made Thu 08 Jul 2021 14:11:37 BST # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: block/io: Merge discard request alignments block: Add backend_defaults property block/file-posix: Optimize for macOS util/async: print leaked BH name when AioContext finalizes util/async: add a human-readable name to BHs for debugging Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-08Merge remote-tracking branch ↵Peter Maydell7-215/+235
'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging linux-user pull request 20210708 Code and style cleanup Add ppid in self/stat ELF_HWCAP for RISC-V # gpg: Signature made Thu 08 Jul 2021 11:07:31 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-6.1-pull-request: linux-user/syscall: Remove hardcoded tabs (code style) linux-user/alpha: Remove hardcoded tabs (code style) linux-user/mips: Handle TARGET_EWOULDBLOCK as TARGET_EAGAIN linux-user/hppa: Handle TARGET_EWOULDBLOCK as TARGET_EAGAIN linux-user/alpha: Handle TARGET_EWOULDBLOCK as TARGET_EAGAIN linux-user: Fix style problems in linuxload.c linux-user: fill ppid field in /proc/self/stat linux-user/elfload: Implement ELF_HWCAP for RISC-V Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-08tests/tcg: generalise the disabling of the signals testAlex Bennée3-6/+6
It turns out you push down in one place and failures pop-up elsewhere. Especially on CI. Disable for now for all targets. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-07linux-user/syscall: Remove hardcoded tabs (code style)Philippe Mathieu-Daudé1-94/+94
We are going to move this code, fix its style first. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210704183755.655002-12-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-07linux-user/alpha: Remove hardcoded tabs (code style)Philippe Mathieu-Daudé1-99/+97
We are going to move this code, fix its style first. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210704183755.655002-7-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-07linux-user/mips: Handle TARGET_EWOULDBLOCK as TARGET_EAGAINPhilippe Mathieu-Daudé2-0/+4
Linux kernel defines EWOULDBLOCK as EAGAIN (since before v2.6.12-rc2). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210704183755.655002-4-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-07linux-user/hppa: Handle TARGET_EWOULDBLOCK as TARGET_EAGAINPhilippe Mathieu-Daudé1-0/+2
Linux kernel defines EWOULDBLOCK as EAGAIN (since before v2.6.12-rc2). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210704183755.655002-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-07linux-user/alpha: Handle TARGET_EWOULDBLOCK as TARGET_EAGAINPhilippe Mathieu-Daudé1-0/+2
Linux kernel defines EWOULDBLOCK as EAGAIN (since before v2.6.12-rc2). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210704183755.655002-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-07linux-user: Fix style problems in linuxload.cRichard Henderson1-22/+20
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210706234932.356913-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-07linux-user: fill ppid field in /proc/self/statAndreas Schwab1-0/+3
Signed-off-by: Andreas Schwab <schwab@suse.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <mvmwnqnef5g.fsf@suse.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-07linux-user/elfload: Implement ELF_HWCAP for RISC-VKito Cheng1-0/+13
Set I, M, A, F, D and C bit for hwcap if misa is set. Signed-off-by: Kito Cheng <kito.cheng@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210706035015.122899-1-kito.cheng@sifive.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-07-07MAINTAINERS: Add maintainer for vhost-user RNG implementationMathieu Poirier1-0/+9
This patch adds entry for the vhost-user-rng related files. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Message-Id: <20210614202842.581640-6-mathieu.poirier@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-06block/io: Merge discard request alignmentsAkihiko Odaki1-0/+2
Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-id: 20210705130458.97642-3-akihiko.odaki@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-07-06block: Add backend_defaults propertyAkihiko Odaki3-4/+79
backend_defaults property allow users to control if default block properties should be decided with backend information. If it is off, any backend information will be discarded, which is suitable if you plan to perform live migration to a different disk backend. If it is on, a block device may utilize backend information more aggressively. By default, it is auto, which uses backend information for block sizes and ignores the others, which is consistent with the older versions. Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-id: 20210705130458.97642-2-akihiko.odaki@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-07-06block/file-posix: Optimize for macOSAkihiko Odaki1-2/+25
This commit introduces "punch hole" operation and optimizes transfer block size for macOS. Thanks to Konstantin Nazarov for detailed analysis of a flaw in an old version of this change: https://gist.github.com/akihikodaki/87df4149e7ca87f18dc56807ec5a1bc5#gistcomment-3654667 Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-id: 20210705130458.97642-1-akihiko.odaki@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-07-06Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell34-1579/+1170
staging * More Meson test conversions and configure cleanups * Generalize XSAVE area offset so that it matches AMD processors on KVM * Improvements for -display and deprecation of -no-quit * Enable SMP configuration as a compound machine property ("-M smp.cpus=...") * Haiku compilation fix * Add icon on Darwin # gpg: Signature made Tue 06 Jul 2021 08:35:23 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (40 commits) config-host.mak: remove unused compiler-related lines Set icon for QEMU binary on Mac OS qemu-option: remove now-dead code machine: add smp compound property vl: switch -M parsing to keyval keyval: introduce keyval_parse_into keyval: introduce keyval_merge qom: export more functions for use with non-UserCreatable objects configure: convert compiler tests to meson, part 6 configure: convert compiler tests to meson, part 5 configure: convert compiler tests to meson, part 4 configure: convert compiler tests to meson, part 3 configure: convert compiler tests to meson, part 2 configure: convert compiler tests to meson, part 1 configure: convert HAVE_BROKEN_SIZE_MAX to meson configure, meson: move CONFIG_IVSHMEM to meson meson: store dependency('threads') in a variable meson: sort existing compiler tests configure, meson: convert libxml2 detection to meson configure, meson: convert liburing detection to meson ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-06config-host.mak: remove unused compiler-related linesPaolo Bonzini2-11/+0
Most of the build is not done via Makefiles, therefore the toolchain variables are mostly unused. They are still used by tests/tcg and pc-bios/roms, but most of them are not needed there. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06Set icon for QEMU binary on Mac OSJohn Arbuckle2-6/+19
Before switching the build system over to Meson, an icon was added to the QEMU binary on Mac OS. This patch adds back that feature; it piggybacks on the existing scripts/entitlement.sh, which already does in-place changes to the executable on Darwin. Signed-off-by: John Arbuckle <programmingkidx@gmail.com> Message-Id: <20210705195328.36442-1-programmingkidx@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06qemu-option: remove now-dead codePaolo Bonzini3-79/+10
-M was the sole user of qemu_opts_set and qemu_opts_set_defaults, remove them and the arguments that they used. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06machine: add smp compound propertyPaolo Bonzini4-69/+95
Make -smp syntactic sugar for a compound property "-machine smp.{cores,threads,cpu,...}". machine_smp_parse is replaced by the setter for the property. numa-test will now cover the new syntax, while other tests still use -smp. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06vl: switch -M parsing to keyvalPaolo Bonzini1-163/+140
Switch from QemuOpts to keyval. This enables the introduction of non-scalar machine properties, and JSON syntax in the future. For JSON syntax to be supported right now, we would have to consider what would happen if string-based dictionaries (produced by -M key=val) were to be merged with strongly-typed dictionaries (produced by -M {'key': 123}). The simplest way out is to never enter the situation, and only allow one -M option when JSON syntax is in use. However, we want options such as -smp to become syntactic sugar for -M, and this is a problem; as soon as -smp becomes a shortcut for -M, QEMU would forbid using -M '{....}' together with -smp. Therefore, allowing JSON syntax right now for -M would be a forward-compatibility nightmare and it would be impossible anyway to introduce -M incrementally in tools. Instead, support for JSON syntax is delayed until after the main options are converted to QOM compound properties. These include -boot, -acpitable, -smbios, -m, -semihosting-config, -rtc and -fw_cfg. Once JSON syntax is introduced, these options will _also_ be forbidden together with -M '{...}'. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06keyval: introduce keyval_parse_intoPaolo Bonzini2-8/+37
Allow parsing multiple keyval sequences into the same dictionary. This will be used to simplify the parsing of the -M command line option, which is currently a .merge_lists = true QemuOpts group. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06keyval: introduce keyval_mergePaolo Bonzini3-0/+139
This patch introduces a function that merges two keyval-produced (or keyval-like) QDicts. It can be used to emulate the behavior of .merge_lists = true QemuOpts groups, merging -readconfig sections and command-line options in a single QDict, and also to implement -set. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06qom: export more functions for use with non-UserCreatable objectsPaolo Bonzini2-16/+65
Machines and accelerators are not user-creatable but they are going to share similar command-line parsing machinery. Export functions that will be used with -machine and -accel in softmmu/vl.c. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06configure: convert compiler tests to meson, part 6Paolo Bonzini2-75/+11
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06configure: convert compiler tests to meson, part 5Paolo Bonzini2-101/+26
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06configure: convert compiler tests to meson, part 4Paolo Bonzini2-142/+34
And remove them from the summary, since now their outcome is verbosely included in the meson output. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06configure: convert compiler tests to meson, part 3Paolo Bonzini2-87/+10
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06configure: convert compiler tests to meson, part 2Paolo Bonzini2-49/+5
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06configure: convert compiler tests to meson, part 1Paolo Bonzini3-366/+43
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06configure: convert HAVE_BROKEN_SIZE_MAX to mesonPaolo Bonzini2-17/+9
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-06configure, meson: move CONFIG_IVSHMEM to mesonPaolo Bonzini3-11/+4
This is a duplicate of CONFIG_EVENTFD, handle it directly in meson.build. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.1 at 2025-03-05 04:53:05 +0000