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AgeCommit message (Expand)AuthorFilesLines
2007-04-14Add TARGET_FMT_plx to properly display target_phys_addr_t variables.j_mayer1-0/+2
2007-04-13Nicer Log formatting.ths1-1/+1
2007-04-13Another fix for CP0 Cause register handling.ths2-2/+2
2007-04-13Fix Sparc32 device save methodsblueswir13-3/+17
2007-04-13Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS opsblueswir12-38/+111
2007-04-13Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)blueswir14-2/+18
2007-04-12Add PowerPC 405 input pins (IRQ, resets, ...) model.j_mayer5-24/+133
2007-04-12Embedded PowerPC Device Control Registers infrastructure.j_mayer4-7/+117
2007-04-11Fix bad variable name.ths1-1/+1
2007-04-11Make SYNCI_Step and CCRes CPU-specific.ths2-3/+16
2007-04-11Throw RI for invalid MFMC0-class instructions. Introduce optionalths2-3/+18
2007-04-11Code formatting fix.ths1-935/+938
2007-04-11More Context/Xcontext fixes. Ifdef some 64bit-only ops, they mayths2-10/+10
2007-04-09Implement embedded IRQ controller for PowerPC 6xx/740 & 750.j_mayer9-119/+287
2007-04-09Fix monitor disasm output for Sparc64 targetblueswir11-0/+3
2007-04-09Fix CP0_IntCtl handling.ths2-2/+6
2007-04-09Proper handling of reserved bits in the context register.ths1-1/+1
2007-04-09Mark watchpoint features as unimplemented.ths2-3/+9
2007-04-09Catch unaligned sc/scd.ths2-0/+10
2007-04-09Fix exception handling cornercase for rdhwr.ths2-37/+9
2007-04-09Remove bogus mtc0 handling.ths1-10/+0
2007-04-09ARM IRQ fix.pbrook1-1/+1
2007-04-08Fix generated code disasm output on Sparc64 hostblueswir11-0/+3
2007-04-08Sparc32/64 CPU selection for user emulatorblueswir11-0/+16
2007-04-07Fix TCX base on SS10blueswir11-1/+1
2007-04-07Unify IRQ handling.pbrook71-624/+592
2007-04-07PowerPC 64 fixesj_mayer1-2/+2
2007-04-07cpu_get_phys_page_debug should return target_phys_addr_tj_mayer10-18/+20
2007-04-07Remove dead code.pbrook1-13/+6
2007-04-07Remove dead code.pbrook1-38/+0
2007-04-07Implement prefx.ths1-1/+41
2007-04-07Set proper BadVAddress value for unaligned instruction fetch.ths1-1/+2
2007-04-07Actually skip over delay slot for a non-taken branch likely.ths1-2/+2
2007-04-07Fix ins/ext cornercase.ths1-4/+4
2007-04-06Comment spelling fix.pbrook1-1/+1
2007-04-06Full implementation of IEEE exceptions (Aurelien Jarno)blueswir14-14/+154
2007-04-06Enforce even float register pair for double register ops (Aurelien Jarno)blueswir11-1/+1
2007-04-06Fix handling of ADES exceptions.ths1-1/+3
2007-04-06Save state for all CP0 instructions, they may throw a CPU exception.ths3-16/+45
2007-04-06Use correct type for card field.pbrook1-1/+1
2007-04-06SD card emulation (initial implementation by Andrzei Zaborowski).pbrook10-8/+2084
2007-04-06Code provision for x86_64 and PowerPC 64 linux user mode support.j_mayer5-6/+82
2007-04-06Add alpha targets.j_mayer1-0/+4
2007-04-06Fix for PowerPC 64 rotates.j_mayer1-27/+35
2007-04-06Code provision for 64 bits linux user-mode targets support.j_mayer6-0/+1242
2007-04-05fix branch delay slot cornercases.ths2-3/+6
2007-04-05Fix rotr immediate ops, mask shift/rotate arguments to their allowedths3-48/+103
2007-04-05Handle EBase properly.ths1-1/+1
2007-04-05Fix disabling of the Cause register for R2.ths1-11/+11
2007-04-05Fix RDHWR handling. Code formatting. Don't use *_direct versions to raiseths2-92/+131
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