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AgeCommit message (Expand)AuthorFilesLines
2011-01-17bsd-user: Fix possible memory leaks and wrong realloc callStefan Weil1-6/+31
2011-01-17sm501: add 2D engine copyrect supportAurelien Jarno1-3/+37
2011-01-17Merge remote branch 'mst/for_anthony' into stagingAnthony Liguori23-55/+359
2011-01-16m48t59: Fix a wrong opaque passed to nvram read and write routinesHervé Poussineau1-5/+6
2011-01-16gdbstub: Close connection in gdb_exitFabien Chouteau1-0/+6
2011-01-16USB keyboard emulation key mapping errorMichael Tokarev1-1/+1
2011-01-16target-sh4: implement negc using TCGAurelien Jarno3-17/+15
2011-01-16target-sh4: use rotl/rotr when possibleAurelien Jarno1-5/+3
2011-01-16tcg/sparc64: fix segfaultBlue Swirl1-0/+7
2011-01-15target-sh4: correct use of ! and &Aurelien Jarno1-2/+2
2011-01-15monitor: fix a typoBlue Swirl1-2/+2
2011-01-14make_device_config: Fix non-fatal error message with dash and other shellsStefan Weil1-1/+1
2011-01-14MAINTAINERS: add entries for TCGAurelien Jarno1-0/+53
2011-01-14MAINTAINERS: Change MIPS and SH4 maintainersAurelien Jarno1-4/+4
2011-01-14MAINTAINERS: fix typosAurelien Jarno1-2/+2
2011-01-14target-arm: Restore IT bits when resuming after an exceptionPeter Maydell1-0/+36
2011-01-14linux-user: ARM: clear the IT bits when invoking a signal handlerPeter Maydell1-7/+9
2011-01-14target-arm: Refactor translation of exception generating instructionsPeter Maydell1-28/+15
2011-01-14target-arm: Remove redundant setting of IT bits before Thumb SWIPeter Maydell1-1/+0
2011-01-14target-arm: Translate with user-state from TB flags, not CPUStatePeter Maydell1-5/+1
2011-01-14target-arm: Set privileged bit in TB flags correctly for M profilePeter Maydell1-1/+7
2011-01-14target-arm: Translate with condexec bits from TB flags, not CPUStatePeter Maydell1-3/+3
2011-01-14target-arm: Translate with Thumb state from TB flags, not CPUStatePeter Maydell1-3/+3
2011-01-14target-arm: Translate with VFP len/stride from TB flags, not CPUStatePeter Maydell1-3/+7
2011-01-14target-arm: Translate with VFP-enabled from TB flags, not CPUStatePeter Maydell1-9/+5
2011-01-14target-arm: Add symbolic constants for bitfields in TB flagsPeter Maydell1-6/+39
2011-01-14target-arm: Don't generate code specific to current CPU mode for SRSPeter Maydell2-33/+25
2011-01-14target-arm: Use the standard FPSCR value for VRSQRTSPeter Maydell1-1/+1
2011-01-14target-arm: Add support for 'Standard FPSCR Value' as used by NeonPeter Maydell2-0/+18
2011-01-14target-arm: Fix implementation of VRSQRTSPeter Maydell1-1/+9
2011-01-14softfloat: Add float32_is_zero_or_denormal() functionPeter Maydell1-0/+5
2011-01-14lsi53c895a: fix endianness issuesAurelien Jarno1-2/+2
2011-01-14mips/malta: fix board idAurelien Jarno1-1/+1
2011-01-14target-sh4: use setcond when possibleAurelien Jarno1-29/+27
2011-01-14target-sh4: log instructions start in TCG codeAurelien Jarno1-0/+4
2011-01-14target-sh4: simplify comparisons after a 'and' opAurelien Jarno1-3/+3
2011-01-14target-sh4: fix reset on r2dAurelien Jarno3-19/+36
2011-01-14target-sh4: optimize exceptionsAurelien Jarno2-15/+12
2011-01-14target-sh4: add ftrv instructionAurelien Jarno3-0/+38
2011-01-14target-sh4: add fipr instructionAurelien Jarno3-0/+33
2011-01-14target-sh4: implement FPU exceptionsAurelien Jarno1-22/+136
2011-01-14target-sh4: implement flush-to-zeroAurelien Jarno2-0/+2
2011-01-14target-sh4: define FPSCR constantsAurelien Jarno3-9/+37
2011-01-14target-sh4: use default-NaN modeAurelien Jarno1-0/+1
2011-01-14softfloat: fix default-NaN modeAurelien Jarno1-18/+18
2011-01-14softfloat: SH4 has the sNaN bit setAurelien Jarno1-5/+5
2011-01-14target-sh4: switch sh4 to softfloatAurelien Jarno1-3/+3
2011-01-14configure: fix broken testAurelien Jarno1-1/+1
2011-01-14make trace options use autoconfy namesPaolo Bonzini1-4/+4
2011-01-14move --srcdir detection earlierPaolo Bonzini1-5/+7
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