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2012-10-17target-arm/translate: Fix RRX operandsPeter Crosthwaite1-1/+1
Instructions that both use the RRX second operand and update CS were incorrect, as the Carry flag was updated too early. An example of such an instruction would be: ands r12,r13,RRX Ands, because of the "s" flag will update the carry flag. But the RRX second operand rotates through the C flag which should happen before the update. Fixed the ordering of the two, the old carry is read by "r13,RRX" before being updated. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reported-by: Vinesh Peringat <vineshp@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Optimize mulu2Richard Henderson3-0/+47
Like add2, do operand ordering, constant folding, and dead operand elimination. The latter happens about 15% of all mulu2 during an x86_64 bios boot. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Optimize half-dead add2/sub2Richard Henderson1-1/+33
When x86_64 guest is not in 64-bit mode, the high-part of the 64-bit add is dead. When the host is 32-bit, we can simplify to 32-bit arithmetic. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Constant fold add2 and sub2Richard Henderson2-0/+44
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Do constant folding on double-word comparisonsRichard Henderson1-21/+72
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Split out subroutines from do_constant_folding_condRichard Henderson1-71/+81
We can re-use these for implementing double-word folding. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Optimize double-word comparisons against zeroRichard Henderson1-0/+39
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Use common code when failing to optimizeRichard Henderson1-59/+32
This saves a whole lot of repetitive code sequences. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Swap commutative double-word comparisonsRichard Henderson1-0/+26
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Canonicalize add2 operand orderingRichard Henderson1-0/+5
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg: Split out swap_commutative as a subroutineRichard Henderson1-32/+24
Reduces code duplication and prefers movcond d, c1, c2, const, s to movcond d, c1, c2, s, const It also prefers add r, r, c over add r, c, r when both inputs are known constants. This doesn't matter for true add, as we will fully constant fold that. But it matters for a follow-on patch using this routine for add2 which may not be fully foldable. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17target-mips: Pass MIPSCPU to mips_vpe_sleep()Andreas Färber1-3/+7
Needed for moving halted field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17target-mips: Pass MIPSCPU to mips_tc_sleep()Andreas Färber1-3/+5
Needed for changing mips_vpe_sleep() argument type to MIPSCPU. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17target-mips: Pass MIPSCPU to mips_vpe_is_wfi()Andreas Färber1-4/+8
Needed for moving halted field to CPUState. The variable name "c" is retained for MIPSCPU to leave "cpu" for CPUState. Also change return type to bool while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17target-mips: Pass MIPSCPU to mips_tc_wake()Andreas Färber1-3/+8
Needed for changing mips_vpe_is_wfi() argument type to MIPSCPU. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17target-mips: Clean up other_cpu in helper_{d,e}vpe()Andreas Färber1-14/+14
Free the variable name "other_cpu" for later use for MIPSCPU. Fix off-by-one indentation while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg-ia64: Implement depositRichard Henderson2-2/+58
Note that in the general reg=reg,reg case we're restricted to 16-bit insertions. This makes it easy to allow "any" constant as input, as post-truncation it will fit into the constant load insn for which we have room in the bundle. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg/ia64: slightly optimize TLB access codeAurelien Jarno1-5/+17
It is possible to slightly optimize the TLB access code, by replacing the movi + and instructions by a deposit instruction. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg/ia64: remove suboptimal register shifting in qemu_ld/st opsAurelien Jarno1-39/+37
Remove suboptimal register shifting in qemu_ld/st ops, introduced at the CONFIG_TCG_PASS_AREG0 time. As mem_idx is now loaded in register R58/R59 for the slow path, we have to make sure to do it last, to not add additional register constraints. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg/ia64: implement movcond_i32/64Aurelien Jarno2-2/+40
Implement movcond_i32/64 on ia64 hosts. It is not possible to have immediate compare arguments without adding a new bundle, but it is possible to have 22-bit immediate value arguments. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg/ia64: use stack for TCG tempsBlue Swirl1-3/+4
Use stack instead of temp_buf array in CPUState for TCG temps. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg/arm: Implement movcond_i32Peter Maydell2-1/+11
Implement movcond_i32 for ARM, as the sequence mov dst, v2 (implicitly done by the tcg common code) cmp c1, c2 movCC dst, v1 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-17tcg/arm: Factor out code to emit immediate or reg-reg opPeter Maydell1-26/+20
The code to emit either an immediate cmp or a register cmp insn is duplicated in several places; factor it out into its own function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-14Fix popcnt in long modemalc1-1/+1
Thanks to Andriy Gapon for initial problem report. Signed-off-by: malc <av1474@comtv.ru>
2012-10-13sun4u: Pass SPARCCPU to cpu_set_ivec_irq()Andreas Färber1-4/+3
Needed for moving halted field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13sun4u: Pass SPARCCPU to cpu_kick_irq()Andreas Färber1-4/+6
Needed for changing qemu_cpu_kick() argument type to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13sun4u: Pass SPARCCPU to {,s,hs}tick_irq() and cpu_timer_create()Andreas Färber1-8/+11
Needed for changing cpu_kick_irq() argument type to SPARCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13sun4m: Pass SPARCCPU to cpu_kick_irq()Andreas Färber1-2/+4
Needed for changing qemu_cpu_kick() argument type to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13sun4m: Pass SPARCCPU to cpu_set_irq()Andreas Färber1-2/+3
Needed for changing cpu_kick_irq() argument type to SPARCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Emit MOVR insns for setcond_i64 and movcond_64Richard Henderson1-5/+30
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Emit BPr insns for brcond_i64Richard Henderson1-2/+47
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Dump illegal opode contentsRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Drop use of Bicc in favor of BPccRichard Henderson1-160/+145
Now that we're always sparcv9, we can not bother using Bicc for 32-bit branches and BPcc for 64-bit branches and instead always use BPcc. New interfaces allow less direct use of tcg_out32 and raw numbers inside the qemu_ld/st routines. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Optimize setcond2 equality compare with 0.Richard Henderson1-3/+12
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Use Z constraint for %g0Richard Henderson2-60/+66
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix add2/sub2Richard Henderson1-8/+22
We must care not to clobber the high parts before we consume them. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix setcondRichard Henderson1-14/+19
The set of comparisons that can immediately use the carry are LTU/GEU, not LTU/LEU. Don't swap operands when we need a temp register; the register may already be in use from setcond2. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix qemu_st for 32-bitRichard Henderson1-3/+4
The datalo variable is still live in the miss path. Use another when reconstructing the full data value. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix setcond2Richard Henderson1-20/+18
Like brcond2, use tcg_high_cond. Use movcc instead of branches. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Implement movcond.Richard Henderson2-9/+38
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix brcond2Richard Henderson1-16/+7
Much the same problem as recently fixed for hppa. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13target-sparc: Don't compute full flags value so oftenRichard Henderson4-19/+26
Avoid speculatively computing flags before every potentially trapping operation and instead do the flags computation when a trap actually occurs. This gives approximately 30% speedup in emulation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13target-sparc: Avoid unnecessary local temporariesRichard Henderson1-21/+9
Now that save_state never ends a BB, we don't need to copy values into local temps around it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13target-sparc: Optimize CC_OP_LOGIC conditionsRichard Henderson1-18/+40
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13target-sparc: Fix optimized %icc comparisonsRichard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-12Merge remote-tracking branch 'pmaydell/arm-devs.for-upstream' into stagingAnthony Liguori8-83/+137
* pmaydell/arm-devs.for-upstream: arm_gic: Rename gic_state to GICState zynq_slcr: Fixed ResetValues enum versatilepb: add gpio pl061 support hw/ds1338: Implement state save/restore hw/ds1338: Remove 'now' field from state struct hw/ds1338: Recapture current time when register pointer wraps around hw/ds1338: Fix mishandling of register pointer hw/arm_gic.c: Fix improper DPRINTF output. cadence_ttc: Fix 'clear on read' behavior
2012-10-12Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori3-37/+39
* stefanha/trivial-patches: vnc: fix "info vnc" with "-vnc ..., reverse=on" sheepdog: use bool for boolean variables configure: Tidy up remnants of non-64-bit physaddrs
2012-10-12Merge remote-tracking branch 'kraxel/usb.67' into stagingAnthony Liguori2-11/+23
* kraxel/usb.67: uhci: Raise interrupt when requested even for non active tds usb-redir: Don't make migration fail in none seamless case usb-redir: Change usbredir_open_chardev into usbredir_create_parser
2012-10-12Merge remote-tracking branch 'mdroth/qga-pull-10-9-12' into stagingAnthony Liguori2-4/+11
* mdroth/qga-pull-10-9-12: qemu-ga: ga_open_pidfile(): add new line to pidfile qemu-ga: use state dir from CONFIG_QEMU_LOCALSTATEDIR configure: add --localstatedir
2012-10-12Merge remote-tracking branch 'awilliam/tags/vfio-pci-for-qemu-20121008.0' ↵Anthony Liguori2-307/+305
into staging * awilliam/tags/vfio-pci-for-qemu-20121008.0: vfio-pci: Fix BAR->VFIODevice translation in vfio-pci: Clang cleanup vfio-pci: Cleanup on INTx setup failure vfio-pci: Extend reset vfio-pci: Remove setting of MSI qsize vfio-pci: Use uintptr_t for void* cast vfio-pci: Don't peak at msi_supported vfio-pci: Roll the header into the .c file vfio-pci: No spurious MSIs vfio-pci: Rework MSIX setup/teardown vfio-pci: Unmap and retry DMA mapping vfio-pci: Re-order map/unmap vfio-pci: Update slow path INTx algorithm
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