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2011-01-14target-arm: Add symbolic constants for bitfields in TB flagsPeter Maydell1-6/+39
Add symbolic constants for the bitfields we use in the TB flags. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-arm: Don't generate code specific to current CPU mode for SRSPeter Maydell2-33/+25
When translating the SRS instruction, handle the "store registers to stack of current mode" case in the helper function rather than inline. This means the generated code does not make assumptions about the current CPU mode which might not be valid when the TB is executed later. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-arm: Use the standard FPSCR value for VRSQRTSPeter Maydell1-1/+1
VSQRTS always uses the standard FPSCR value as it is a Neon instruction. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-arm: Add support for 'Standard FPSCR Value' as used by NeonPeter Maydell2-0/+18
Add support to the ARM helper routines for a second fp_status value which should be used for operations which the ARM ARM indicates use "ARM standard floating-point arithmetic" rather than being controlled by the rounding/flush/NaN settings in the FPSCR. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-arm: Fix implementation of VRSQRTSPeter Maydell1-1/+9
The implementation of the ARM VRSQRTS instruction (which calculates (3 - op1 * op2) / 2) was missing the division operation. It also did not handle the special cases of (0,inf) and (inf,0). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14softfloat: Add float32_is_zero_or_denormal() functionPeter Maydell1-0/+5
Add a utility function to softfloat to test whether a float32 is zero or denormal. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14lsi53c895a: fix endianness issuesAurelien Jarno1-2/+2
lsi_ram_read*() and lsi_ram_write*() are not consistent, one uses leXX_to_cpu() the other uses nothing. As the comment above the RAM declaration says: "Script ram is stored as 32-bit words in host byteorder.", remove the leXX_to_cpu() calls. This fixes the boot of an ARM versatile machine on MIPS and PowerPC hosts. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14mips/malta: fix board idAurelien Jarno1-1/+1
Board id can't be written with stl_phys() as it's read-only part of memory. Use stl_p() on the memory buffer instead. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: use setcond when possibleAurelien Jarno1-29/+27
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: log instructions start in TCG codeAurelien Jarno1-0/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: simplify comparisons after a 'and' opAurelien Jarno1-3/+3
When a TCG variable is anded with a value and the compared with the same value, we can simply invert the comparison and compare it with 0. The generated code is smaller. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: fix reset on r2dAurelien Jarno3-19/+36
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: optimize exceptionsAurelien Jarno2-15/+12
As exception is not the normal path, don't bother saving PC, before raising one, instead rely on code retranslation to get the CPU state. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: add ftrv instructionAurelien Jarno3-0/+38
Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-column matrix XMTRX by the 4-dimensional vector FVn. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: add fipr instructionAurelien Jarno3-0/+33
Add the fipr FVm,FVn instruction, which computes the inner products of a 4-dimensional single precision floating-point vector. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: implement FPU exceptionsAurelien Jarno1-22/+136
FPU exception support where not implemented on SH4. Implement them by clearing the softfloat exceptions flags before an FP instruction (the SH4 FPU also clear them before an instruction), and calling a function to update the FPSCR register after an FP instruction. This function update the corresponding FPSCR bits (both flags and cumulative flags) and trigger exception if enabled. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: implement flush-to-zeroAurelien Jarno2-0/+2
When the FPSCR.DN bit is set, the SH4 FPU treat denormalized numbers as zero. Enable the corresponding softfloat option when this bit is set. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: define FPSCR constantsAurelien Jarno3-9/+37
Define FPSCR constants for all field and use them instead of hardcoded values. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: use default-NaN modeAurelien Jarno1-0/+1
SH4 FPU doesn't propagate NaN, and instead always regenerate new ones. Enable the default-NaN mode by default. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14softfloat: fix default-NaN modeAurelien Jarno1-18/+18
When the default-NaN mode is enabled, it should return the default NaN value, but it should anyway raise the invalid operation flag if one of the operand is an sNaN. I have checked that this behavior matches the ARM and SH4 manuals, as well as real SH4 hardware. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14softfloat: SH4 has the sNaN bit setAurelien Jarno1-5/+5
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: switch sh4 to softfloatAurelien Jarno1-3/+3
We need to be able to catch exceptions correctly and thus enable softfloat on SH4. As all machines except i386 and x86_64 are using softfloat, make it the default and change the case to detect i386 and x86_64. Note that CRIS doesn't have an FPU, so it can be configured with both softfloat-native and softfloat. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14configure: fix broken testAurelien Jarno1-1/+1
Since commit d1807a4f836c27f6dc7061e53a834dd27f78e46a ./configure tries to test files and directories with "test -f", which only test for regular files. Test with "test -e", which looks for any kind of files. This unbreak the configure script when not using a separate object directory. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14make trace options use autoconfy namesPaolo Bonzini1-4/+4
These are not in any release, so I am just renaming them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14move --srcdir detection earlierPaolo Bonzini1-5/+7
This will help getting config.guess and config.sub from the srcdir. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14 [PATCH v3 14/15] remove HOST_CC mention from roms/{sea, vga}bios/config.makPaolo Bonzini1-1/+0
Not used in the submodules. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14remove source_path_usedPaolo Bonzini1-29/+16
Not necessary since we use mkdir -p and from this patch test -f. Also, dirname returns "." if a path has no directory component, as is the case for "sh configure". Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14move "ln -sf" emulation to a functionPaolo Bonzini1-15/+11
"ln -sf" does not really do anything more than "ln -s" on Solaris. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14reorganize sdl-config testsPaolo Bonzini1-13/+13
This also allows overriding it with SDL_CONFIG, and warning in suspicious cross-compilation scenarios. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14do not default to non-prefixed pkg-config when cross compilingPaolo Bonzini1-2/+2
This can still be requested with PKG_CONFIG=/path/to/pkg-config. Just do not use it as a default, and print a warning. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14fix spelling of $pkg_config, move default together with other cross toolsPaolo Bonzini1-17/+17
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14provide portable HOST_LONG_BITS testPaolo Bonzini1-7/+9
Do not hardcode the list of 64-bit CPUs. Use sizeof(void *) to compute it. Renaming it to HOST_LONG_BITS to HOST_POINTER_BITS is left for later. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14do not pass bogus $(SRC_PATH) include paths to cc during configurePaolo Bonzini3-12/+16
Non-existent -I paths are dropped silently by the compiler, but still it is not polite to pass bogus options. Configure-time tests do not need any include files from the source path, so only include -I flags at make time (when they're properly expanded). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14test cc with the complete set of chosen flagsPaolo Bonzini1-25/+25
The "test the C compiler works ok" comes before a bunch of flags are added for --cpu or just depending on the host. It helps debugging if the test is done after these flags are (unconditionally) added. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14fix sparse support (?)Paolo Bonzini1-5/+5
I didn't test with sparse, but the old code using += before a variable was set was wrong. Sparse support should probably be ripped out or redone, but this at least keeps some sanity. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14move feature variables to the topPaolo Bonzini1-82/+82
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14default make and install to environment variablesPaolo Bonzini1-9/+10
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14default compilation tools to environment variablesPaolo Bonzini1-13/+7
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-14microblaze: Improve unconditional direct branchingEdgar E. Iglesias1-7/+14
Avoid emitting conditional tcg operations for uncoditional direct branches. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
2011-01-13cris: Set btaken when storing direct jumpsEdgar E. Iglesias1-0/+3
When storing a direct jmp from translation state into runtime state we should set the btaken flag. Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2011-01-13slirp: Use strcasecmp() to check tftp mode, tsizeSergei Gavrikov1-2/+2
According to RFC 1350 (TFTP Revision 2) the mode field can contain any combination of upper and lower case; also RFC 2349 propagates that the transfer size option ("tsize") is case in-sensitive too. Current implementation of embedded TFTP server missed that what does mess some TFTP clients. Fixed by using STRCASECMP(3) in the required places. Signed-off-by: Sergei Gavrikov <sergei.gavrikov@gmail.com> Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2011-01-12ppc405_uc: fix a buffer overflowBlue Swirl1-2/+3
Fix a buffer overflow, reported by cppcheck: [/src/qemu/hw/ppc405_uc.c:72]: (error) Buffer access out-of-bounds: bd.bi_s_version The use of field bi_s_version seems to be a typo, it should be bi_r_version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-12lan9118: fix a buffer overflowBlue Swirl1-2/+2
Fix a buffer overflow, reported by cppcheck: [/src/qemu/hw/lan9118.c:849]: (error) Buffer access out-of-bounds: s.eeprom All eeprom handling code assumes that the size of eeprom is 128, except lan9118_eeprom_cmd. Fix this by restricting the address passed. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-12vpc: fix a file descriptor leakBlue Swirl1-17/+30
Fix a file descriptor leak, reported by cppcheck: [/src/qemu/block/vpc.c:524]: (error) Resource leak: fd Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-12qemu-io: fix a memory leakBlue Swirl1-1/+3
Fix a memory leak, reported by cppcheck: [/src/qemu/qemu-io.c:1135]: (error) Memory leak: ctx Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-12vvfat: fix a file descriptor leakBlue Swirl1-0/+1
Fix a file descriptor leak, reported by cppcheck: [/src/qemu/block/vvfat.c:759]: (error) Resource leak: dir Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-12loader: fix a file descriptor leakBlue Swirl1-2/+3
Fix a file descriptor leak, reported by cppcheck: [/src/qemu/hw/loader.c:311]: (error) Resource leak: fd Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-12vnc-auth-sasl: fix a memory leakBlue Swirl1-6/+8
Fix a memory leak reported by cppcheck: [/src/qemu/ui/vnc-auth-sasl.c:448]: (error) Memory leak: mechname Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-12audio: split sample conversion and volume mixingMichael Walle13-55/+52
Refactor the volume mixing, so it can be reused for capturing devices. Additionally, it removes superfluous multiplications with the nominal volume within the hardware voice code path. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: malc <av1474@comtv.ru>
2011-01-12disas: remove opcode printing on ARM hostsAurelien Jarno1-5/+0
Following commit 5d48e9174e3bfa8655e1dc8f80887acd9040b427, it's possible to remove the hack that used to display the opcodes on ARM hosts only. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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