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2019-03-12PPC: E500: Add FSL I2C controller and integrate RTC with itAndrew Randrianasulu6-0/+419
Original commit message: This patch adds an emulation model for i2c controller found on most of the FSL SoCs. It also integrates the RTC (ds1338) that sits on the i2c Bus with e500 machine model. Patch was originally written by Amit Singh Tomar <amit.tomar@freescale.com> see http://patchwork.ozlabs.org/patch/431475/ I only fixed it enough for application on top of current qemu master 20b084c4b1401b7f8fbc385649d48c67b6f43d44, and hopefully fixed checkpatch errors Tested by booting Linux kernel 4.20.12. Now e500 machine doesn't need network time protocol daemon because it will have working RTC (before all timestamps on files were from 2016) Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com> Signed-off-by: Andrew Randrianasulu <randrianasulu@gmail.com> Message-Id: <20190306102812.28972-1-randrianasulu@gmail.com> [dwg: Add Kconfig stanza to define the new symbol, update MAINTAINERS] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc/spapr: Enable H_PAGE_INIT in-kernel handlingSuraj Jitindar Singh3-0/+13
The H_CALL H_PAGE_INIT can be used to zero or copy a page of guest memory. Enable the in-kernel H_PAGE_INIT handler. The in-kernel handler takes half the time to complete compared to handling the H_CALL in userspace. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190306060608.19935-1-sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12spapr: Force SPAPR_MEMORY_BLOCK_SIZE to be a hwaddr (64-bit)David Gibson1-1/+1
SPAPR_MEMORY_BLOCK_SIZE is logically a difference in memory addresses, and hence of type hwaddr which is 64-bit. Previously it wasn't marked as such which means that it could be treated as 32-bit. That will work in some circumstances but if multiplied by another 32-bit value it could lead to a 32-bit overflow and an incorrect result. One specific instance of this in spapr_lmb_dt_populate() was spotted by Coverity (CID 1399145). Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc/spapr: Clear partition table entry when allocating hash tableSuraj Jitindar Singh2-4/+9
If we allocate a hash page table then we know that the guest won't be using process tables, so set the partition table entry maintained for the guest to zero. If this isn't done, then the guest radix bit will remain set in the entry. This means that when the guest calls H_REGISTER_PROCESS_TABLE there will be a mismatch between then flags and the value in spapr->patb_entry, and the call will fail. The guest will then panic: Failed to register process table (rc=-4) kernel BUG at arch/powerpc/platforms/pseries/lpar.c:959 The result being that it isn't possible to boot a hash guest on a P9 system. Also fix a bug in the flags parsing in h_register_process_table() which was introduced by the same patch, and simplify the handling to make it less likely that errors will be introduced in the future. The effect would have been setting the host radix bit LPCR_HR for a hash guest using process tables, which currently isn't supported and so couldn't have been triggered. Fixes: 00fd075e18 "target/ppc/spapr: Set LPCR:HR when using Radix mode" Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190305022102.17610-1-sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12PPC: E500: Update u-boot to v2019.01Alexander Graf2-0/+0
Quite a while has passed since we last updated U-Boot for e500. This patch bumps it to the last released version 2019.01 to make sure users don't feel like they're using out of date software. Signed-off-by: Alexander Graf <agraf@csgraf.de> Message-Id: <20190304103930.16319-1-agraf@csgraf.de> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc: Refactor kvm_handle_debugFabiano Rosas1-36/+50
There are four scenarios being handled in this function: - single stepping - hardware breakpoints - software breakpoints - fallback (no debug supported) A future patch will add code to handle specific single step and software breakpoints cases so let's split each scenario into its own function now to avoid hurting readability. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20190228225759.21328-5-farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc: Move handling of hardware breakpoints to a separate functionFabiano Rosas1-19/+28
This is in preparation for a refactoring of the kvm_handle_debug function in the next patch. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20190228225759.21328-4-farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc: Move exception vector offset computation into a functionFabiano Rosas1-11/+19
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20190228225759.21328-2-farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc/spapr: Enable mitigations by default for pseries-4.0 machine typeSuraj Jitindar Singh1-3/+6
There are currently 3 mitigations the availability of which is controlled by the spapr-caps mechanism, cap-cfpc, cap-sbbc, and cap-ibs. Enable these mitigations by default for the pseries-4.0 machine type. By now machine firmware should have been upgraded to allow these settings. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190301044609.9626-3-sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc/tcg: make spapr_caps apply cap-[cfpc/sbbc/ibs] non-fatal for tcgSuraj Jitindar Singh1-9/+26
The spapr_caps cap-cfpc, cap-sbbc and cap-ibs are used to control the availability of certain mitigations to the guest. These haven't been implemented under TCG, it is unlikely they ever will be, and it is unclear as to whether they even need to be. As such, make failure to apply these capabilities under TCG non-fatal. Instead we print a warning message to the user but still allow the guest to continue. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190301044609.9626-2-sjitindarsingh@gmail.com> [dwg: Small style fix] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc/spapr: Add SPAPR_CAP_CCF_ASSISTSuraj Jitindar Singh6-1/+58
Introduce a new spapr_cap SPAPR_CAP_CCF_ASSIST to be used to indicate the requirement for a hw-assisted version of the count cache flush workaround. The count cache flush workaround is a software workaround which can be used to flush the count cache on context switch. Some revisions of hardware may have a hardware accelerated flush, in which case the software flush can be shortened. This cap is used to set the availability of such hardware acceleration for the count cache flush routine. The availability of such hardware acceleration is indicated by the H_CPU_CHAR_BCCTR_FLUSH_ASSIST flag being set in the characteristics returned from the KVM_PPC_GET_CPU_CHAR ioctl. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190301031912.28809-2-sjitindarsingh@gmail.com> [dwg: Small style fixes] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc/spapr: Add workaround option to SPAPR_CAP_IBSSuraj Jitindar Singh4-12/+29
The spapr_cap SPAPR_CAP_IBS is used to indicate the level of capability for mitigations for indirect branch speculation. Currently the available values are broken (default), fixed-ibs (fixed by serialising indirect branches) and fixed-ccd (fixed by diabling the count cache). Introduce a new value for this capability denoted workaround, meaning that software can work around the issue by flushing the count cache on context switch. This option is available if the hypervisor sets the H_CPU_BEHAV_FLUSH_COUNT_CACHE flag in the cpu behaviours returned from the KVM_PPC_GET_CPU_CHAR ioctl. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190301031912.28809-1-sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc/spapr: Enable the large decrementer for pseries-4.0Suraj Jitindar Singh2-1/+7
Enable the large decrementer by default for the pseries-4.0 machine type. It is disabled again by default_caps_with_cpu() for pre-POWER9 cpus since they don't support the large decrementer. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190301024317.22137-4-sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc: Implement large decrementer support for KVMSuraj Jitindar Singh3-3/+73
Implement support to allow KVM guests to take advantage of the large decrementer introduced on POWER9 cpus. To determine if the host can support the requested large decrementer size, we check it matches that specified in the ibm,dec-bits device-tree property. We also need to enable it in KVM by setting the LPCR_LD bit in the LPCR. Note that to do this we need to try and set the bit, then read it back to check the host allowed us to set it, if so we can use it but if we were unable to set it the host cannot support it and we must not use the large decrementer. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190301024317.22137-3-sjitindarsingh@gmail.com> [dwg: Small style fixes] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc: Implement large decrementer support for TCGSuraj Jitindar Singh8-33/+114
Prior to POWER9 the decrementer was a 32-bit register which decremented with each tick of the timebase. From POWER9 onwards the decrementer can be set to operate in a mode called large decrementer where it acts as a n-bit decrementing register which is visible as a 64-bit register, that is the value of the decrementer is sign extended to 64 bits (where n is implementation dependant). The mode in which the decrementer operates is controlled by the LPCR_LD bit in the logical paritition control register (LPCR). >From POWER9 onwards the HDEC (hypervisor decrementer) was enlarged to h-bits, also sign extended to 64 bits (where h is implementation dependant). Note this isn't configurable and is always enabled. On POWER9 the large decrementer and hdec are both 56 bits, as represented by the lrg_decr_bits cpu class property. Since they are the same size we only add one property for now, which could be extended in the case they ever differ in the future. We also add the lrg_decr_bits property for POWER5+/7/8 since it is used to determine the size of the hdec, which is only generated on the POWER5+ processor and later. On these processors it is 32 bits. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190301024317.22137-2-sjitindarsingh@gmail.com> [dwg: Small style fixes] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12target/ppc/spapr: Add SPAPR_CAP_LARGE_DECREMENTERSuraj Jitindar Singh3-1/+24
Add spapr_cap SPAPR_CAP_LARGE_DECREMENTER to be used to control the availability of the large decrementer for a guest. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Message-Id: <20190301024317.22137-1-sjitindarsingh@gmail.com> [dwg: Trivial style fix] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12Revert "spapr: support memory unplug for qtest"Greg Kurz1-6/+0
Commit b8165118f52c broke CPU hotplug tests for old machine types: $ QTEST_QEMU_BINARY=ppc64-softmmu/qemu-system-ppc64 ./tests/cpu-plug-test -m=slow /ppc64/cpu-plug/pseries-3.1/device-add/2x3x1&maxcpus=6: OK /ppc64/cpu-plug/pseries-2.12-sxxm/device-add/2x3x1&maxcpus=6: OK /ppc64/cpu-plug/pseries-3.0/device-add/2x3x1&maxcpus=6: OK /ppc64/cpu-plug/pseries-2.10/device-add/2x3x1&maxcpus=6: OK /ppc64/cpu-plug/pseries-2.11/device-add/2x3x1&maxcpus=6: OK /ppc64/cpu-plug/pseries-2.12/device-add/2x3x1&maxcpus=6: OK /ppc64/cpu-plug/pseries-2.9/device-add/2x3x1&maxcpus=6: OK /ppc64/cpu-plug/pseries-2.7/device-add/2x3x1&maxcpus=6: ** ERROR:/home/thuth/devel/qemu/hw/ppc/spapr_events.c:313:rtas_event_log_to_source: assertion failed: (source->enabled) Broken pipe /home/thuth/devel/qemu/tests/libqtest.c:143: kill_qemu() detected QEMU death from signal 6 (Aborted) (core dumped) Aborted (core dumped) The approach of faking the availability of OV5_HP_EVT causes the code to assume the hotplug event source is enabled, which is wrong for older machines. We've now fixed CAS under qtest with a different approach. Therefore, this reverts commit b8165118f52ce5ee88565d3cec83d30374efdc96. A subsequent patch will address the problem of CAS under qtest from a different angle. Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155146875097.147873.1732264036668112686.stgit@bahia.lan> Tested-by: Michael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12spapr: Simulate CAS for qtestGreg Kurz1-0/+11
The RTAS event hotplug code for machine types 2.8 and newer depends on the CAS negotiated ov5 in order to work properly. However, there's no CAS when running under qtest. There has been a tentative to trick the code by faking the OV5_HP_EVT bit, but it turned out to break other assumptions in the code and the change got reverted. Go for a more general approach and simulate a CAS when running under qtest. For simplicity, this pseudo CAS simple simulates the case where the guest supports the same features as the machine. It is done at reset time, just before we reset the DRCs, which could potentially exercise the unplug code. This allows to test unplug on spapr with both older and newer machine types. Suggested-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155146875704.147873.10563808578795890265.stgit@bahia.lan> Tested-by: Michael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12vfio/spapr: Rename local systempagesize variableAlexey Kardashevskiy1-3/+3
The "systempagesize" name suggests that it is the host system page size while it is the smallest page size of memory backing the guest RAM so let's rename it to stop confusion. This should cause no behavioral change. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20190227085149.38596-4-aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12vfio/spapr: Fix indirect levels calculationAlexey Kardashevskiy2-11/+34
The current code assumes that we can address more bits on a PCI bus for DMA than we really can but there is no way knowing the actual limit. This makes a better guess for the number of levels and if the kernel fails to allocate that, this increases the level numbers till succeeded or reached the 64bit limit. This adds levels to the trace point. This may cause the kernel to warn about failed allocation: [65122.837458] Failed to allocate a TCE memory, level shift=28 which might happen if MAX_ORDER is not large enough as it can vary: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/Kconfig?h=v5.0-rc2#n727 Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20190227085149.38596-3-aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-11Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell32-155/+286
* allow building QEMU without TCG or KVM support (Anthony) * update AMD IOMMU copyright (David) * compilation fixes for GCC and BSDs (Alexey, David, Paolo, Philippe) * coalesced I/O bugfix (Jagannathan) * Processor Tracing cpuid fix (Luwei) * Kconfig fixes (Paolo, David) * Cleanups (Paolo, Wei) * PVH vs. multiboot fix (Stefano) * LSI bugfixes (Sven) * elf2dmp Coverity fix (Victor) * scsi-disk fix (Zhengui) * authorization support for chardev TLS (Daniel) # gpg: Signature made Mon 11 Mar 2019 16:12:00 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (31 commits) qemugdb: fix licensing chardev: add support for authorization for TLS clients qom: cpu: destroy work_mutex in cpu_common_finalize exec.c: refactor function flatview_add_to_dispatch() lsi: 810/895A are always little endian lsi: return dfifo value lsi: use SCSI phase names instead of numbers in trace lsi: use enum type for s->msg_action lsi: use enum type for s->waiting lsi: use ldn_le_p()/stn_le_p() scsi-disk: Fix crash if request is invaild or disk is no medium configure: Disable W^X on OpenBSD oslib-posix: Ignore fcntl("/dev/null", F_SETFL, O_NONBLOCK) failure accel: Allow to build QEMU without TCG or KVM support build: clean trace/generated-helpers.c build: remove unnecessary assignments from Makefile.target build: get rid of target-obj-y update copyright notice lsi: check if SIGP bit is already set in Wait reselect lsi: implement basic SBCL functionality ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-11Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-mar-11-2019' ↵Peter Maydell175-440/+9200
into staging MIPS queue for March 11th, 2019 # gpg: Signature made Mon 11 Mar 2019 14:16:09 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-mar-11-2019: target/mips: Add tests for a variety of MSA integer subtract instructions target/mips: Add tests for a variety of MSA integer multiply instructions target/mips: Add tests for a variety of MSA integer dot product instructions target/mips: Add tests for a variety of MSA integer divide instructions target/mips: Add tests for a variety of MSA integer average instructions tests/tcg: target/mips: Rename two header files for consistency tests/tcg: target/mips: Correct preambles of test source files Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-11Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190311' into stagingPeter Maydell11-40/+1455
s390x update: - clean up LowCore definition - first part of vector instruction support for tcg # gpg: Signature made Mon 11 Mar 2019 08:59:02 GMT # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20190311: (33 commits) s390x/tcg: Implement VECTOR UNPACK * s390x/tcg: Implement VECTOR STORE WITH LENGTH s390x/tcg: Implement VECTOR STORE MULTIPLE s390x/tcg: Implement VECTOR STORE ELEMENT s390x/tcg: Implement VECTOR STORE s390x/tcg: Provide probe_write_access helper s390x/tcg: Implement VECTOR SIGN EXTEND TO DOUBLEWORD s390x/tcg: Implement VECTOR SELECT s390x/tcg: Implement VECTOR SCATTER ELEMENT s390x/tcg: Implement VECTOR REPLICATE IMMEDIATE s390x/tcg: Implement VECTOR REPLICATE s390x/tcg: Implement VECTOR PERMUTE DOUBLEWORD IMMEDIATE s390x/tcg: Implement VECTOR PERMUTE s390x/tcg: Implement VECTOR PACK * s390x/tcg: Implement VECTOR MERGE (HIGH|LOW) s390x/tcg: Implement VECTOR LOAD WITH LENGTH s390x/tcg: Implement VECTOR LOAD VR FROM GRS DISJOINT s390x/tcg: Implement VECTOR LOAD VR ELEMENT FROM GR s390x/tcg: Implement VECTOR LOAD TO BLOCK BOUNDARY s390x/tcg: Implement VECTOR LOAD MULTIPLE ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-11qemugdb: fix licensingPaolo Bonzini4-20/+8
qemu-gdb.py was committed after 2012-01-13, so the notice about GPL v2-only contributions does not apply. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11chardev: add support for authorization for TLS clientsDaniel P. Berrange4-3/+28
Currently any client which can complete the TLS handshake is able to use a chardev server. The server admin can turn on the 'verify-peer' option for the x509 creds to require the client to provide a x509 certificate. This means the client will have to acquire a certificate from the CA before they are permitted to use the chardev server. This is still a fairly low bar. This adds a 'tls-authz=OBJECT-ID' option to the socket chardev backend which takes the ID of a previously added 'QAuthZ' object instance. This will be used to validate the client's x509 distinguished name. Clients failing the check will not be permitted to use the chardev server. For example to setup authorization that only allows connection from a client whose x509 certificate distinguished name contains 'CN=fred', you would use: $QEMU -object tls-creds-x509,id=tls0,dir=/home/berrange/qemutls,\ endpoint=server,verify-peer=yes \ -object authz-simple,id=authz0,identity=CN=laptop.example.com,,\ O=Example Org,,L=London,,ST=London,,C=GB \ -chardev socket,host=127.0.0.1,port=9000,server,\ tls-creds=tls0,tls-authz=authz0 \ ...other qemu args... Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2019-03-11qom: cpu: destroy work_mutex in cpu_common_finalizeLi Qiang1-0/+3
Commit 376692b9dc6(cpus: protect work list with work_mutex) initialize a work_mutex in cpu_common_initfn, however forget to destroy it. This will cause resource leak when hotunplug cpu or hotplug cpu fails. Signed-off-by: Li Qiang <liq3ea@163.com> Message-Id: <20190102074114.26988-1-liq3ea@163.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11exec.c: refactor function flatview_add_to_dispatch()Wei Yang1-17/+31
flatview_add_to_dispatch() registers page based on the condition of *section*, which may looks like this: |s|PPPPPPP|s| where s stands for subpage and P for page. The procedure of this function could be described as: - register first subpage - register page - register last subpage This means the procedure could be simplified into these three steps instead of a loop iteration. This patch refactors the function into three corresponding steps and adds some comment to clarify it. Signed-off-by: Wei Yang <richardw.yang@linux.intel.com> Message-Id: <20190311054252.6094-1-richardw.yang@linux.intel.com> [Paolo: move exit before adjustment of remain.offset_within_*, otherwise int128_get64 fails when a region is 2^64 bytes long] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11lsi: 810/895A are always little endianSven Schnelle1-4/+3
Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190218175529.11237-1-svens@stackframe.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11lsi: return dfifo valueSven Schnelle1-1/+1
Code was assigning DFIFO, but didn't return the value to users. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190305195519.24303-6-svens@stackframe.org>
2019-03-11lsi: use SCSI phase names instead of numbers in traceSven Schnelle2-11/+26
This makes trace logs much easier to read, especially for people who are not fluent in SCSI. Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190305195519.24303-5-svens@stackframe.org>
2019-03-11lsi: use enum type for s->msg_actionSven Schnelle1-11/+16
This makes the code easier to read - no functional change. Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190305195519.24303-4-svens@stackframe.org>
2019-03-11lsi: use enum type for s->waitingSven Schnelle1-19/+23
This makes the code easier to read - no functional change. Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190305195519.24303-3-svens@stackframe.org>
2019-03-11lsi: use ldn_le_p()/stn_le_p()Sven Schnelle1-20/+4
Instead of using the open-coded versions, use the helper already present as this makes the code easier to read and less error-prone. Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190305195519.24303-2-svens@stackframe.org>
2019-03-11scsi-disk: Fix crash if request is invaild or disk is no mediumZhengui Li1-13/+24
Qemu will crash with the assertion error that "assert(r->req.aiocb != NULL)" in scsi_read_complete if request is invaild or disk is no medium. The error is below: qemu-kvm: hw/scsi/scsi_disk.c:299: scsi_read_complete: Assertion `r->req.aiocb != NULL' failed. This patch add a funtion scsi_read_complete_noio to fix it. Signed-off-by: Zhengui Li <lizhengui@huawei.com> Message-Id: <1551949966-20092-1-git-send-email-lizhengui@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11configure: Disable W^X on OpenBSDPhilippe Mathieu-Daudé1-0/+11
Since OpenBSD 6.0 [1], W^X is enforced by default [2]. TCG requires WX access. Disable W^X if it is available. This fixes: # lm32-softmmu/qemu-system-lm32 Could not allocate dynamic translator buffer # sysctl kern.wxabort=1 kern.wxabort: 0 -> 1 # lm32-softmmu/qemu-system-lm32 mmap: Not supported Abort trap (core dumped) # gdb -q lm32-softmmu/qemu-system-lm32 qemu-system-lm32.core (gdb) bt #0 0x000017e3c156c50a in _thread_sys___syscall () at {standard input}:5 #1 0x000017e3c15e5d7a in *_libc_mmap (addr=Variable "addr" is not available.) at /usr/src/lib/libc/sys/mmap.c:47 #2 0x000017e17d9abc8b in alloc_code_gen_buffer () at /usr/src/qemu/accel/tcg/translate-all.c:1064 #3 0x000017e17d9abd04 in code_gen_alloc (tb_size=0) at /usr/src/qemu/accel/tcg/translate-all.c:1112 #4 0x000017e17d9abe81 in tcg_exec_init (tb_size=0) at /usr/src/qemu/accel/tcg/translate-all.c:1149 #5 0x000017e17d9897e9 in tcg_init (ms=0x17e45e456800) at /usr/src/qemu/accel/tcg/tcg-all.c:66 #6 0x000017e17d9891b8 in accel_init_machine (acc=0x17e3c3f50800, ms=0x17e45e456800) at /usr/src/qemu/accel/accel.c:63 #7 0x000017e17d989312 in configure_accelerator (ms=0x17e45e456800, progname=0x7f7fffff07b0 "lm32-softmmu/qemu-system-lm32") at /usr/src/qemu/accel/accel.c:111 #8 0x000017e17d9d8616 in main (argc=1, argv=0x7f7fffff06b8, envp=0x7f7fffff06c8) at vl.c:4325 [1] https://www.openbsd.org/faq/upgrade60.html [2] https://undeadly.org/cgi?action=article&sid=20160527203200 Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190307142822.8531-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11oslib-posix: Ignore fcntl("/dev/null", F_SETFL, O_NONBLOCK) failurePhilippe Mathieu-Daudé1-0/+12
Previous to OpenBSD 6.3 [1], fcntl(F_SETFL) is not permitted on memory devices. Trying this call sets errno to ENODEV ("not a memory device"): 19 ENODEV Operation not supported by device. An attempt was made to apply an inappropriate function to a device, for example, trying to read a write-only device such as a printer. Do not assert fcntl failures in this specific case (errno set to ENODEV) on OpenBSD. This fixes: $ lm32-softmmu/qemu-system-lm32 assertion "f != -1" failed: file "util/oslib-posix.c", line 247, function "qemu_set_nonblock" Abort trap (core dumped) [1] The fix seems https://github.com/openbsd/src/commit/c2a35b387f9d3c "fcntl(F_SETFL) invokes the FIONBIO and FIOASYNC ioctls internally, so the memory devices (/dev/null, /dev/zero, etc) need to permit them." Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190307142822.8531-2-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11accel: Allow to build QEMU without TCG or KVM supportAnthony PERARD1-1/+3
Instead of deny build of QEMU without a default accelerator, simply report an error when the user haven't passed -accel or -machine accel= and TCG and KVM isn't builtin. ./configure already check that at least one accelerator is available. Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11build: clean trace/generated-helpers.cPaolo Bonzini1-0/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11build: remove unnecessary assignments from Makefile.targetPaolo Bonzini2-4/+1
It is only necessary to clear block-obj-y because Makefile.objs uses "+=" instead of "="; fix that and remove the assignment. The other variables need not be cleared at all. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11build: get rid of target-obj-yPaolo Bonzini3-8/+4
It is possible to specify the trace/ directory already in objs-y; there is no need to have a separate unnest-vars invocation. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11update copyright noticeDavid Kiarie2-2/+2
Signed-off-by: David Kiarie <davidkiarie4@gmail.com> Message-Id: <20190304151827.1813-2-davidkiarie4@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11lsi: check if SIGP bit is already set in Wait reselectSven Schnelle1-2/+4
If SIGP is set, the 'Wait for Reselection' command should jump immediately to the address stored in the second DWORD of the instruction. This fixes spurious hangs in the HP-UX 11.11 installer when the SIGP bit gets set by the kernel before the 'Wait for Reselection' command is executed by SCRIPTS. Signed-off-by: Sven Schnelle <svens@stackframe.org> Tested-by: Helge Deller <deller@gmx.de> Message-Id: <20190217113717.7077-1-svens@stackframe.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11lsi: implement basic SBCL functionalitySven Schnelle1-4/+27
HP-UX checks this register after sending data to the target. If there's no valid information present, it assumes the client disconnected because the kernel sent to much data. Implement at least some of the SBCL functionality that is possible without having a real SCSI bus. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190215194021.20543-1-svens@stackframe.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11virtio-scsi: Fix build with gcc 9Greg Kurz1-1/+7
Build fails with gcc 9: CC ppc64-softmmu/hw/scsi/virtio-scsi.o hw/scsi/virtio-scsi.c: In function ‘virtio_scsi_do_tmf’: hw/scsi/virtio-scsi.c:265:39: error: taking address of packed member of ‘struct virtio_scsi_ctrl_tmf_req’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 265 | virtio_tswap32s(VIRTIO_DEVICE(s), &req->req.tmf.subtype); | ^~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors All the fields in struct virtio_scsi_ctrl_tmf_req are naturally aligned, so we could in theory drop QEMU_PACKED. Unfortunately, the header file is imported from linux which already has the packed attribute. Trying to fix that in the update-linux-headers.sh script is likely to produce ugliness. Turn the call to virtio_tswap32s() into an assignment instead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155137678223.44753.5438092367451176318.stgit@bahia.lan> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11i386: extended the cpuid_level when Intel PT is enabledLuwei Kang3-0/+13
Intel Processor Trace required CPUID[0x14] but the cpuid_level have no change when create a kvm guest with e.g. "-cpu qemu64,+intel-pt". Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Luwei Kang <luwei.kang@intel.com> Message-Id: <1548805979-12321-1-git-send-email-luwei.kang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11target-i386: add kvm stubs to user-mode emulatorsPaolo Bonzini1-1/+1
The CPUID code will call kvm_arch_get_supported_cpuid() and, even though it is undef kvm_enabled() so it never runs for user-mode emulators, sometimes clang will not optimize it out at -O0. That could be considered a compiler bug, however at -O0 we give it a pass and just add the stubs. Reported-by: Kamil Rytarowski <n54@gmx.com> Tested-by: Kamil Rytarowski <n54@gmx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11configure: Enable werror for git worktreesAlexey Kardashevskiy1-1/+1
The configure script checks multiple times whether it works in a git repository and it does this by "test -e "${source_path}/.git" in 4 cases but in one case where it tries to enable werror "-d" is used there which fails on git worktrees as .git is a file then and not a directory. This changes the test to "-e" as other occurrences. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20190228043503.68494-1-aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11contrib/elf2dmp: add kernel start address checkingViktor Prutyanov1-0/+6
Before this patch, if elf2dmp failed to find NT kernel PE magic in allowed virtual address range, then it assumes NULL as NT kernel address and cause segfault. This patch fix the problem described above by checking NT kernel address before futher processing. Signed-off-by: Viktor Prutyanov <viktor.prutyanov@phystech.edu> Message-Id: <20190219211936.6466-1-viktor.prutyanov@phystech.edu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11block/iscsi: Restrict Linux-specific codePhilippe Mathieu-Daudé1-0/+7
Some Linux specific code is missing guards, leading to build failure on OSX: $ sudo brew install libiscsi $ ./configure && make [...] CC block/iscsi.o qemu/block/iscsi.c:338:24: error: 'iscsi_aiocb_info' defined but not used [-Werror=unused-const-variable=] static const AIOCBInfo iscsi_aiocb_info = { ^~~~~~~~~~~~~~~~ qemu/block/iscsi.c:168:1: error: 'iscsi_schedule_bh' defined but not used [-Werror=unused-function] iscsi_schedule_bh(IscsiAIOCB *acb) ^~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors Add guards to restrict this code for Linux. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190220000553.28438-1-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11hw/i386/pc: run the multiboot loader before the PVH loaderStefano Garzarella1-6/+11
Some multiboot images could be in the ELF format. In the current implementation QEMU fails because we try to load these images as a PVH image. In order to fix this issue, we should try multiboot first (we already check the multiboot magic header before to load it). If it is not a multiboot image, we can try the PVH loader. Fixes: ab969087da6 ("pvh: Boot uncompressed kernel using direct boot ABI", 2019-01-15) Reported-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefano Garzarella <sgarzare@redhat.com> Message-Id: <20190214180216.246707-1-sgarzare@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.1 at 2025-01-16 02:27:48 +0000