aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2018-10-19migration: Fix !replay_can_snapshot() error handlingMarkus Armbruster1-4/+4
Calling error_report() in a function that takes an Error ** argument is suspicious. save_snapshot() and load_snapshot() do that, and then fail without setting an error. Wrong. The HMP commands survive this unscathed, since hmp_handle_error() does nothing when no error has been set. Callers main() (on behalf of -loadvm) and replay_vmstate_init() crash, but I'm not sure the error is possible there. Screwed up when commit 377b21ccea1 (v2.12.0) added incorrect error handling right next to correct examples. Fix by calling error_setg() instead of error_report(). Fixes: 377b21ccea1755a8b0dae822c29567c58dda6939 Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20181017082702.5581-13-armbru@redhat.com>
2018-10-19smbios: Clean up error handling in smbios_add()Markus Armbruster1-28/+62
Calling error_report() in a function that takes an Error ** argument is suspicious. smbios_entry_add() does that, and then exit()s. It also passes &error_fatal to qemu_opts_validate(). Both wrong, but currently harmless, as its only caller passes &error_fatal. Messed up in commit 1007a37e208. Clean it up. Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20181017082702.5581-12-armbru@redhat.com>
2018-10-19ioapic: Fix error handling in realize()Markus Armbruster1-4/+4
Calling error_report() in a function that takes an Error ** argument is suspicious. ioapic_realize() does that, and then exit()s. Currently mostly harmless, as the device cannot be hot-plugged. Fixes: 20fd4b7b6d9282fe0cb83601f1821f31bd257458 Cc: Peter Xu <peterx@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20181017082702.5581-11-armbru@redhat.com>
2018-10-19pc: Fix machine property nvdimm-persistence error handlingMarkus Armbruster1-2/+3
Calling error_report() in a function that takes an Error ** argument is suspicious. pc.c's pc_machine_set_nvdimm_persistence() does that, and then exit()s. Wrong. Attempting to set machine property nvdimm-persistence to a bad value instantly kills the VM: $ qemu-system-x86_64 -nodefaults -S -display none -qmp stdio {"QMP": {"version": {"qemu": {"micro": 50, "minor": 0, "major": 3}, "package": "v3.0.0-837-gc5e4e49258"}, "capabilities": []}} {"execute": "qmp_capabilities"} {"return": {}} {"execute": "qom-set", "arguments": {"path": "/machine", "property": "nvdimm-persistence", "value": "instadeath"}} -machine nvdimm-persistence=instadeath: unsupported option $ echo $? 1 Broken when commit 11c39b5cd96 (v3.0.0) replaced error_propagate(); return by error_report(); exit() instead of error_setg(); return. Fix that. Fixes: 11c39b5cd966ddc067a1ca0c5392ec9b666c45b7 Cc: "Michael S. Tsirkin" <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20181017082702.5581-10-armbru@redhat.com>
2018-10-199pfs: Fix CLI parsing crash on errorMarkus Armbruster1-2/+4
Calling error_report() in a function that takes an Error ** argument is suspicious. 9p-handle.c's handle_parse_opts() does that, and then fails without setting an error. Wrong. Its caller crashes when it tries to report the error: $ qemu-system-x86_64 -nodefaults -fsdev id=foo,fsdriver=handle qemu-system-x86_64: -fsdev id=foo,fsdriver=handle: warning: handle backend is deprecated qemu-system-x86_64: -fsdev id=foo,fsdriver=handle: fsdev: No path specified Segmentation fault (core dumped) Screwed up when commit 91cda4e8f37 (v2.12.0) converted the function to Error. Fix by calling error_setg() instead of error_report(). Fixes: 91cda4e8f372602795e3a2f4bd2e3adaf9f82255 Cc: Greg Kurz <groug@kaod.org> Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Greg Kurz <groug@kaod.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20181017082702.5581-9-armbru@redhat.com>
2018-10-19char: Use error_printf() to print help and suchMarkus Armbruster2-2/+2
Calling error_report() in a function that takes an Error ** argument is suspicious. Convert a few that are actually help and such to error_printf(). Improves output of -chardev help from qemu-system-x86_64: -chardev help: Available chardev backend types: serial ... to Available chardev backend types: serial ... Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Marc-André Lureau" <marcandre.lureau@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20181017082702.5581-8-armbru@redhat.com>
2018-10-19vfio: Clean up error reporting after previous commitMarkus Armbruster4-8/+7
The previous commit changed vfio's warning messages from vfio warning: DEV-NAME: Could not frobnicate to warning: vfio DEV-NAME: Could not frobnicate To match this change, change error messages from vfio error: DEV-NAME: On fire to vfio DEV-NAME: On fire Note the loss of "error". If we think marking error messages that way is a good idea, we should mark *all* error messages, i.e. make error_report() print it. Cc: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Message-Id: <20181017082702.5581-7-armbru@redhat.com>
2018-10-19vfio: Use warn_report() & friends to report warningsMarkus Armbruster3-10/+10
The vfio code reports warnings like error_report(WARN_PREFIX "Could not frobnicate", DEV-NAME); where WARN_PREFIX is defined so the message comes out as vfio warning: DEV-NAME: Could not frobnicate This usage predates the introduction of warn_report() & friends in commit 97f40301f1d. It's time to convert to that interface. Since these functions already prefix the message with "warning: ", replace WARN_PREFIX by VFIO_MSG_PREFIX, so the messages come out like warning: vfio DEV-NAME: Could not frobnicate The next commit will replace ERR_PREFIX. Cc: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20181017082702.5581-6-armbru@redhat.com>
2018-10-19cpus hw target: Use warn_report() & friends to report warningsMarkus Armbruster8-24/+25
Calling error_report() in a function that takes an Error ** argument is suspicious. Convert a few that are actually warnings to warn_report(). While there, split a warning consisting of multiple sentences to conform to conventions spelled out in warn_report()'s contract. Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Fam Zheng <famz@redhat.com> Cc: Wei Huang <wei@redhat.com> Cc: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20181017082702.5581-5-armbru@redhat.com>
2018-10-19block: Use warn_report() & friends to report warningsMarkus Armbruster3-4/+4
Calling error_report() in a function that takes an Error ** argument is suspicious. Convert a few that are actually warnings to warn_report(). While there, split warnings consisting of multiple sentences to conform to conventions spelled out in warn_report()'s contract, and improve a rather useless warning in sheepdog.c. Cc: Kevin Wolf <kwolf@redhat.com> Cc: Ronnie Sahlberg <ronniesahlberg@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Lieven <pl@kamp.de> Cc: Liu Yuan <namei.unix@gmail.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20181017082702.5581-4-armbru@redhat.com> Drop changes to "without an explicit read-only=on" warnings, because there's a series removing them pending. Also drop a cc: to a former Sheepdog maintainer. Reviewed-by: Kevin Wolf <kwolf@redhat.com>
2018-10-19Use error_fatal to simplify obvious fatal errors (again)Markus Armbruster4-17/+23
Add a slight improvement of the Coccinelle semantic patch from commit 007b06578ab, and use it to clean up. It leaves dead Error * variables behind, cleaned up manually. Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Alexander Graf <agraf@suse.de> Cc: Eric Blake <eblake@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20181017082702.5581-3-armbru@redhat.com>
2018-10-19error: Fix use of error_prepend() with &error_fatal, &error_abortMarkus Armbruster13-33/+61
From include/qapi/error.h: * Pass an existing error to the caller with the message modified: * error_propagate(errp, err); * error_prepend(errp, "Could not frobnicate '%s': ", name); Fei Li pointed out that doing error_propagate() first doesn't work well when @errp is &error_fatal or &error_abort: the error_prepend() is never reached. Since I doubt fixing the documentation will stop people from getting it wrong, introduce error_propagate_prepend(), in the hope that it lures people away from using its constituents in the wrong order. Update the instructions in error.h accordingly. Convert existing error_prepend() next to error_propagate to error_propagate_prepend(). If any of these get reached with &error_fatal or &error_abort, the error messages improve. I didn't check whether that's the case anywhere. Cc: Fei Li <fli@suse.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20181017082702.5581-2-armbru@redhat.com>
2018-10-19vl: Print error when using incorrect backend for debugconPhilippe Mathieu-Daudé1-0/+1
When using an incorrect backend for the debugcon, QEMU exits silently without any error indication, which is confusing. Add a message that the character backend is invalid. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20181011171254.32428-1-philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-10-19scripts: Remove check-qerror.shAlberto Garcia2-25/+3
qerror.h contains leftovers from the now-defunct QError API. There's only a handful of string macros left, and no one is supposed to add anything else. The check-qerror.sh script was used to make sure that all definitions on the qerror.c and qerror.h files were sorted alphabetically. The former was removed three years ago, and the latter is now in a different location, so the script doesn't even work (as a matter of fact the alphabetical order was broken last time someone added a macro -also in 2015- and no one seemed to notice). There's no point in fixing this script so let's just remove it. The rogue macro is also moved to its correct location. Signed-off-by: Alberto Garcia <berto@igalia.com> Message-Id: <20181017151738.20299-1-berto@igalia.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-10-19Merge remote-tracking branch ↵Peter Maydell2-25/+53
'remotes/vivier2/tags/linux-user-for-3.1-pull-request' into staging Add a workaround for clang bug and remove misleading comment (sparc) # gpg: Signature made Thu 18 Oct 2018 20:00:17 BST # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-3.1-pull-request: linux-user/sparc/signal.c: Remove unnecessary comment linux-user: Suppress address-of-packed-member warnings in __get/put_user_e Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-19Merge remote-tracking branch ↵Peter Maydell14-162/+1618
'remotes/amarkovic/tags/mips-queue-october-2018-part1-v2' into staging MIPS queue October 2018, part1, v2 # gpg: Signature made Thu 18 Oct 2018 19:39:00 BST # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-october-2018-part1-v2: (28 commits) target/mips: Add opcodes for nanoMIPS EVA instructions target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PH target/mips: Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S> target/mips: Implement hardware page table walker for MIPS32 target/mips: Add reset state for PWSize and PWField registers target/mips: Add CP0 PWCtl register target/mips: Add CP0 PWSize register target/mips: Add CP0 PWField register target/mips: Add CP0 PWBase register target/mips: Add CP0 Config2 to DisasContext target/mips: Improve DSP R2/R3-related naming target/mips: Add availability control for DSP R3 ASE target/mips: Add bit definitions for DSP R3 ASE target/mips: Reorganize bit definitions for insn_flags (ISAs/ASEs flags) target/mips: Increase 'supported ISAs/ASEs' flag holder size target/mips: Add opcode values of MXU ASE target/mips: Add organizational chart of MXU ASE target/mips: Add assembler mnemonics list for MXU ASE target/mips: Add basic description of MXU ASE target/mips: Add a comment before each CP0 register section in cpu.h ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-18target/mips: Add opcodes for nanoMIPS EVA instructionsDimitrije Nikolic1-0/+34
Add opcodes for nanoMIPS EVA instructions: CACHEE, LBE, LBUE, LHE, LHUE, LLE, LLWPE, LWE, PREFE, SBE, SCE, SCWPE, SHE, SWE. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Dimitrije Nikolic <dnikolic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PHStefan Markovic1-1/+1
Fix misplaced 'break' in handling of NM_SHRA_R_PH. Found by Coverity (CID 1395627). Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S>Matthew Fortune1-8/+8
Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S> instructions. Their handling was permuted. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Matthew Fortune <matthew.fortune@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Implement hardware page table walker for MIPS32Yongbok Kim3-3/+370
Implement hardware page table walker. This implementation is limiter only to MIPS32. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add reset state for PWSize and PWField registersYongbok Kim1-0/+18
Add reset state for PWSize and PWField registers. The reset state is different for pre-R6 and R6 (and post-R6) ISAa. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add CP0 PWCtl registerYongbok Kim5-2/+45
Add PWCtl register (CP0 Register 5, Select 6). The PWCtl register configures hardware page table walking for TLB refills. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. It contains following fields: PWEn (31) - Hardware Page Table walker enable PWDirExt (30) - If 1, 4-th level implemented (MIPS64 only) XK (28) - If 1, walker handles xkseg (MIPS64 only) XS (27) - If 1, walker handles xsseg (MIPS64 only) XU (26) - If 1, walker handles xuseg (MIPS64 only) DPH (7) - Dual Page format of Huge Page support HugePg (6) - Huge Page PTE supported in Directory levels PSn (5..0) - Bit position of PTEvld in Huge Page PTE Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add CP0 PWSize registerYongbok Kim5-2/+43
Add PWSize register (CP0 Register 5, Select 7). The PWSize register configures hardware page table walking for TLB refills. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. It contains following fields: BDW (37..32) Base Directory index width (MIPS64 only) GDW (29..24) Global Directory index width UDW (23..18) Upper Directory index width MDW (17..12) Middle Directory index width PTW (11..6 ) Page Table index width PTEW ( 5..0 ) Left shift applied to the Page Table index Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add CP0 PWField registerYongbok Kim5-2/+101
Add PWField register (CP0 Register 5, Select 6). The PWField register configures hardware page table walking for TLB refills. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. It contains following fields: MIPS64: BDI (37..32) - Base Directory index GDI (29..24) - Global Directory index UDI (23..18) - Upper Directory index MDI (17..12) - Middle Directory index PTI (11..6 ) - Page Table index PTEI ( 5..0 ) - Page Table Entry shift MIPS32: GDW (29..24) - Global Directory index UDW (23..18) - Upper Directory index MDW (17..12) - Middle Directory index PTW (11..6 ) - Page Table index PTEW ( 5..0 ) - Page Table Entry shift Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add CP0 PWBase registerYongbok Kim3-2/+37
Add PWBase register (CP0 Register 5, Select 5). The PWBase register contains the Page Table Base virtual address. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add CP0 Config2 to DisasContextStefan Markovic1-0/+2
Add field corresponding to CP0 Config2 to DisasContext. This is needed for availability control via Config2 bits. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Improve DSP R2/R3-related namingStefan Markovic5-112/+120
Do following replacements: ASE_DSPR2 -> ASE_DSP_R2 ASE_DSPR3 -> ASE_DSP_R3 MIPS_HFLAG_DSPR2 -> MIPS_HFLAG_DSP_R2 MIPS_HFLAG_DSPR3 -> MIPS_HFLAG_DSP_R3 check_dspr2() -> check_dsp_r2() check_dspr3() -> check_dsp_r3() and several other similar minor replacements. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add availability control for DSP R3 ASEStefan Markovic3-5/+22
Add infrastructure for availability control for DSP R3 ASE MIPS instructions. Only BPOSGE32C currently belongs to DSP R3 ASE, but this is likely to be changed in near future. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add bit definitions for DSP R3 ASEStefan Markovic2-0/+2
Add DSP R3 ASE related bit definition for insn_flags and hflags. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Reorganize bit definitions for insn_flags (ISAs/ASEs flags)Philippe Mathieu-Daudé1-34/+44
Distribute bits 56-63 vendor-specific ASEs as follows: - bits 0-31 MIPS base instruction sets - bits 32-47 MIPS ASEs - bits 48-55 vendor-specific base instruction sets - bits 56-63 vendor-specific ASEs Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Increase 'supported ISAs/ASEs' flag holder sizePhilippe Mathieu-Daudé3-5/+5
Increase the size of insn_flags holder size to 64 bits. This is needed for future extensions since existing bits are almost all used. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add opcode values of MXU ASEAleksandar Markovic1-0/+276
Add opcode values for all instructions in MXU ASE. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add organizational chart of MXU ASEAleksandar Markovic1-0/+155
Add a comment that contains an organizational chart of MXU ASE instructions. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add assembler mnemonics list for MXU ASEAleksandar Markovic1-0/+88
Add a comment that contains a list all MXU instructions, expressed in assembler mnemonics. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add basic description of MXU ASEAleksandar Markovic1-0/+20
Add a comment that contains a basic description of MXU ASE. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add a comment before each CP0 register section in cpu.hAleksandar Markovic1-0/+88
Add a comment before each CP0 register section in CPUMIPSState definition, thus visually separating these sections. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18target/mips: Add a comment with an overview of CP0 registersAleksandar Markovic1-0/+109
Add a comment with an overview of CP0 registers close to the definition of their corresponding fields in CPUMIPSState. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18linux-user: Add infrastructure for handling MIPS-specific prctl()Stefan Markovic1-0/+8
Add infrastructure for handling MIPS-specific prctl(). This is, for now, just an empty placeholder. The real handling will be implemented in subsequent patches. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18linux-user: Add MIPS-specific prctl() optionsStefan Markovic2-0/+8
Add MIPS-specific prctl() options TARGET_PR_SET_FP_MODE and TARGET_PR_SET_FP_MODE. These values are essentially copied from linux kernel header include/uapi/linux/prctl.h. This is done in a way consistent with a similar case of aarch64-specific prctl() options TARGET_PR_SVE_SET_VL and TARGET_PR_SVE_GET_VL. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18elf: Fix comments to EF_MIPS_MACH_xxx constantsFredrik Noring1-2/+2
Regarding R5900 CPU, some sources indicate that the Emotion Engine ISA/ASE was designed by Toshiba and licensed to Sony. Others sources claim it was a joint effort. It therefore makes sense to refer to the CPU as "Toshiba/Sony R5900". Also, remove and "'s" in the line for some other CPU, for the sake of consistency. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reported-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18elf: Add Mips_elf_abiflags_v0 structureStefan Markovic1-0/+16
Add Mips_elf_abiflags_v0 structure to elf.h. The source of information is kernel header arch/mips/include/asm/elf.h. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18elf: Add MIPS_ABI_FP_XXX constantsStefan Markovic1-0/+8
Add MIPS_ABI_FP_XXX constants to elf.h. The source of information is kernel header arch/mips/include/asm/elf.h. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18elf: Fix PT_MIPS_XXX constantsStefan Markovic1-2/+5
Fix existing and add missing PT_MIPS_XXX constants in elf.h. This is copied from kernel header arch/mips/include/asm/elf.h. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18mailmap: Add an item for Yongbok KimAleksandar Markovic1-0/+1
Yongbok Kim used two email adresses for QEMU contributions - his company changed its ownership/name. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-18linux-user/sparc/signal.c: Remove unnecessary commentPeter Maydell1-4/+0
Remove a comment suggesting that we need to call tb_flush() after writing the SPARC signal frame trampoline insns. This isn't necessary in QEMU, because (even if the guest architecture requires explicit icache maintenance) we ensure that memory writes result in invalidation of translated code from that memory. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20181009184017.15675-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-10-18linux-user: Suppress address-of-packed-member warnings in __get/put_user_ePeter Maydell1-21/+53
Our __get_user_e() and __put_user_e() macros cause newer versions of clang to generate false-positive -Waddress-of-packed-member warnings if they are passed the address of a member of a packed struct (see https://bugs.llvm.org/show_bug.cgi?id=39113). Suppress these using the _Pragma() operator. Unfortunately _Pragma() support in gcc is broken in some gcc versions and in some usage contexts, so we limit the pragma usage here to clang. To put in the pragmas we need to convert the macros from expressions to statements, but all the callsites effectively treat them as statements already so this is OK. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20181009161814.21257-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-10-18Merge remote-tracking branch ↵Peter Maydell19-193/+69
'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging - Updates for qtest entries in test/Makefile.include - Simple updates for some shell scripts - Misc simple patches for files without regular subsystem pull requests # gpg: Signature made Wed 17 Oct 2018 08:20:35 BST # gpg: using RSA key 2ED9D774FE702DB5 # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" # gpg: aka "Thomas Huth <thuth@redhat.com>" # gpg: aka "Thomas Huth <huth@tuxfamily.org>" # gpg: aka "Thomas Huth <th.huth@posteo.de>" # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2018-10-17: configure: remove glib_subprocess check hw/core/generic-loader: Compile only once, not for each target cpu: Provide a proper prototype for target_words_bigendian() in a header hw/core/generic-loader: Set a category for the generic-loader device qemu/compiler: Wrap __attribute__((flatten)) in a macro mailmap: Fix Reimar Döffinger name show-fixed-bugs.sh: Modern shell scripting (use $() instead of ``) git-submodule.sh: Modern shell scripting (use $() instead of ``) archive-source.sh: Modern shell scripting (use $() instead of ``) MAINTAINERS: update block/sheepdog maintainers gdbstub: Remove unused include tests: remove gcov-files- variables tests: Prevent more accidental test disabling target/cris/translate: Get rid of qemu_log_separate() qemu-common.h: update copyright date to 2018 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-18Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-20181016' into stagingPeter Maydell1-1/+2
Queued hppa patch # gpg: Signature made Tue 16 Oct 2018 23:45:46 BST # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-hppa-20181016: target/hppa: Raise exception 26 on emulated hardware Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-17configure: remove glib_subprocess checkMarc-André Lureau1-6/+0
This should have been removed as part of commit 692fbdf9f4c6f6bafd0b3a4d4f94973effd3bbae. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-10-17hw/core/generic-loader: Compile only once, not for each targetThomas Huth2-6/+2
The generic-loader is currently compiled target specific due to one single "#ifdef TARGET_WORDS_BIGENDIAN" in the file. We have already a function called target_words_bigendian() for this instead, so we can put the generic-loader into common-obj to save some compilation time. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
generated by cgit v1.1 at 2025-01-12 12:49:52 +0000