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2018-02-22sdcard: warn if host uses an incorrect address for APP CMD (CMD55)Philippe Mathieu-Daudé1-0/+5
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-15-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: check the card is in correct state for APP CMD (CMD55)Philippe Mathieu-Daudé1-0/+8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-14-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: handles more commands in SPI modePhilippe Mathieu-Daudé1-3/+26
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-13-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: use a more descriptive label 'unimplemented_spi_cmd'Philippe Mathieu-Daudé1-9/+13
Suggested-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-12-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: handle the Security Specification commandsPhilippe Mathieu-Daudé1-0/+12
returning sd_illegal, since they are not implemented. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-11-f4bug@amsat.org [PMM: tweak multiline comment format] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: handle CMD54 (SDIO)Philippe Mathieu-Daudé1-3/+2
Linux uses it to poll the bus before polling for a card. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-10-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: use the registerfields API for the CARD_STATUS register masksPhilippe Mathieu-Daudé1-3/+45
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-9-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: use the correct masked OCR in the R3 replyPhilippe Mathieu-Daudé1-5/+16
use the registerfields API to access the OCR register Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-8-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: simplify using the ldst APIPhilippe Mathieu-Daudé1-29/+9
the code is easier to review/refactor. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-7-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: remove commands from unsupported old MMC specificationPhilippe Mathieu-Daudé1-33/+0
This device does not model MMCA Specification previous to v4.2 Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: clean the SCR register and add few commentsPhilippe Mathieu-Daudé1-3/+6
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: fix the 'maximum data transfer rate' to 25MHzPhilippe Mathieu-Daudé1-1/+1
To comply with Spec v1.10 (and 2.00, 3.01): . TRAN_SPEED for current SD Memory Cards that field must be always 0_0110_010b (032h) which is equal to 25MHz - the mandatory maximum operating frequency of SD Memory Card. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-4-f4bug@amsat.org [PMM: fixed comment indent] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: update the CSD CRC register regardless the CSD structure versionPhilippe Mathieu-Daudé1-2/+1
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: Don't always set the high capacity bitPhilippe Mathieu-Daudé1-1/+4
Don't set the high capacity bit by default as it will be set if required in the sd_set_csd() function. [based on a patch from Alistair Francis <alistair.francis@xilinx.com> and Peter Ogden <ogden@xilinx.com> from qemu/xilinx tag xilinx-v2015.4] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215221325.7611-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: use the registerfields API to access the OCR registerPhilippe Mathieu-Daudé2-9/+13
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215220540.6556-12-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: use G_BYTE from cutilsPhilippe Mathieu-Daudé1-1/+2
code is now easier to read. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215220540.6556-11-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: define SDMMC_CMD_MAX instead of using the magic '64'Philippe Mathieu-Daudé2-6/+31
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215220540.6556-8-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: add more trace eventsPhilippe Mathieu-Daudé2-6/+39
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215220540.6556-6-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: replace fprintf() by qemu_hexdump()Philippe Mathieu-Daudé1-15/+1
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215220540.6556-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: add a trace event for command responsesPhilippe Mathieu-Daudé2-3/+25
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180215220540.6556-4-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: replace DPRINTF() by trace eventsPhilippe Mathieu-Daudé2-6/+32
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215220540.6556-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22sdcard: reorder SDState struct membersPhilippe Mathieu-Daudé1-7/+9
place card registers first, this will ease further code movements. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180215220540.6556-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22hw/sd/ssi-sd: use the SDBus API, connect the SDCard to the busPhilippe Mathieu-Daudé1-13/+19
On reset the bus will reset the card, we can now drop the device_reset() call. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180216022933.10945-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22hw/sd/milkymist-memcard: expose a SDBus and connect the SDCard to itPhilippe Mathieu-Daudé1-17/+21
using the sdbus_*() API. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Michael Walle <michael@walle.cc> Message-id: 20180216022933.10945-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22hw/sd/milkymist-memcard: split realize() out of SysBusDevice init()Philippe Mathieu-Daudé1-12/+16
Create the SDCard in the realize() function. Suggested-by: Michael Walle <michael@walle.cc> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Michael Walle <michael@walle.cc> Message-id: 20180216022933.10945-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22hw/sd/milkymist-memcard: use qemu_log_mask()Philippe Mathieu-Daudé1-7/+10
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Michael Walle <michael@walle.cc> Message-id: 20180216022933.10945-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22Fix ast2500 protection register emulationHugo Landau2-2/+12
Some register blocks of the ast2500 are protected by protection key registers which require the right magic value to be written to those registers to allow those registers to be mutated. Register manuals indicate that writing the correct magic value to these registers should cause subsequent reads from those values to return 1, and writing any other value should cause subsequent reads to return 0. Previously, qemu implemented these registers incorrectly: the registers were handled as simple memory, meaning that writing some value x to a protection key register would result in subsequent reads from that register returning the same value x. The protection was implemented by ensuring that the current value of that register equaled the magic value. This modifies qemu to have the correct behaviour: attempts to write to a ast2500 protection register results in a transition to 1 or 0 depending on whether the written value is the correct magic. The protection logic is updated to ensure that the value of the register is nonzero. This bug caused deadlocks with u-boot HEAD: when u-boot is done with a protectable register block, it attempts to lock it by writing the bitwise inverse of the correct magic value, and then spinning forever until the register reads as zero. Since qemu implemented writes to these registers as ordinary memory writes, writing the inverse of the magic value resulted in subsequent reads returning that value, leading to u-boot spinning forever. Signed-off-by: Hugo Landau <hlandau@devever.net> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180220132627.4163-1-hlandau@devever.net [PMM: fixed incorrect code indentation] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22hw/char/stm32f2xx_usart: fix TXE/TC bit handlingRichard Braun2-5/+14
I/O currently being synchronous, there is no reason to ever clear the SR_TXE bit. However the SR_TC bit may be cleared by software writing to the SR register, so set it on each write. In addition, fix the reset value of the USART status register. Signed-off-by: Richard Braun <rbraun@sceen.net> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> [PMM: removed XXX tag from comment, since it isn't something we need to come back and fix in QEMU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22raspi: Add "raspi3" machine typePekka Enberg1-0/+23
This patch adds a "raspi3" machine type, which can now be selected as the machine to run on by users via the "-M" command line option to QEMU. The machine type does *not* ignore memory transaction failures so we likely need to add some dummy devices later when people run something more complicated than what I'm using for testing. Signed-off-by: Pekka Enberg <penberg@iki.fi> [PMM: added #ifdef TARGET_AARCH64 so we don't provide the 64-bit board in the 32-bit only arm-softmmu build.] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22target/arm: Fix register definitions for VMIDR and VMPIDRPeter Maydell1-4/+4
The register definitions for VMIDR and VMPIDR have separate reginfo structs for the AArch32 and AArch64 registers. However the 32-bit versions are wrong: * they use offsetof instead of offsetoflow32 to mark where the 32-bit value lives in the uint64_t CPU state field * they don't mark themselves as ARM_CP_ALIAS In particular this means that if you try to use an Arm guest CPU which enables EL2 on a big-endian host it will assert at reset: target/arm/cpu.c:114: cp_reg_check_reset: Assertion `oldvalue == newvalue' failed. because the reset of the 32-bit register writes to the top half of the uint64_t. Correct the errors in the structures. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- This is necessary for 'make check' to pass on big endian systems with the 'raspi3' board enabled, which is the first board which has an EL2-enabled-by-default CPU.
2018-02-22Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-signed' ↵Peter Maydell4-0/+0
into staging Update OpenBIOS images # gpg: Signature made Thu 22 Feb 2018 08:12:01 GMT # gpg: using RSA key 5BC2C56FAE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-openbios-signed: Update OpenBIOS images to 54d959d9 built from submodule. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22Merge remote-tracking branch ↵Peter Maydell49-2941/+2204
'remotes/stsquad/tags/pull-softfloat-refactor-210218-1' into staging This is the re-factor of softfloat: - shared common code path float16/32/64 - well commented and easy to follow code - added a bunch of float16 support While some operations are slower the key ones exercised by the floating point dbt-bench are the same: https://i.imgur.com/oXNJNql.png # gpg: Signature made Wed 21 Feb 2018 10:44:14 GMT # gpg: using RSA key FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-softfloat-refactor-210218-1: (22 commits) fpu/softfloat: re-factor sqrt fpu/softfloat: re-factor compare fpu/softfloat: re-factor minmax fpu/softfloat: re-factor scalbn fpu/softfloat: re-factor int/uint to float fpu/softfloat: re-factor float to int/uint fpu/softfloat: re-factor round_to_int fpu/softfloat: re-factor muladd fpu/softfloat: re-factor div fpu/softfloat: re-factor mul fpu/softfloat: re-factor add/sub fpu/softfloat: define decompose structures fpu/softfloat: move the extract functions to the top of the file fpu/softfloat: improve comments on ARM NaN propagation include/fpu/softfloat: add some float16 constants include/fpu/softfloat: implement float16_set_sign helper include/fpu/softfloat: implement float16_chs helper include/fpu/softfloat: implement float16_abs helper target/*/cpu.h: remove softfloat.h fpu/softfloat-types: new header to prevent excessive re-builds ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-22Update OpenBIOS images to 54d959d9 built from submodule.Mark Cave-Ayland4-0/+0
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2018-02-21fpu/softfloat: re-factor sqrtAlex Bennée2-111/+97
This is a little bit of a departure from softfloat's original approach as we skip the estimate step in favour of a straight iteration. There is a minor optimisation to avoid calculating more bits of precision than we need however this still brings a performance drop, especially for float64 operations. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21fpu/softfloat: re-factor compareAlex Bennée2-54/+82
The compare function was already expanded from a macro. I keep the macro expansion but move most of the logic into a compare_decomposed. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21fpu/softfloat: re-factor minmaxAlex Bennée2-107/+126
Let's do the same re-factor treatment for minmax functions. I still use the MACRO trick to expand but now all the checking code is common. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21fpu/softfloat: re-factor scalbnAlex Bennée2-73/+34
This is one of the simpler manipulations you could make to a floating point number. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21fpu/softfloat: re-factor int/uint to floatAlex Bennée2-180/+172
These are considerably simpler as the lower order integers can just use the higher order conversion function. As the decomposed fractional part is a full 64 bit rounding and inexact handling comes from the pack functions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21fpu/softfloat: re-factor float to int/uintAlex Bennée2-755/+193
We share the common int64/uint64_pack_decomposed function across all the helpers and simply limit the final result depending on the final size. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21fpu/softfloat: re-factor round_to_intAlex Bennée2-174/+146
We can now add float16_round_to_int and use the common round_decomposed and canonicalize functions to have a single implementation for float16/32/64 round_to_int functions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-21fpu/softfloat: re-factor muladdAlex Bennée3-575/+272
We can now add float16_muladd and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 muladd functions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-21fpu/softfloat: re-factor divAlex Bennée3-148/+137
We can now add float16_div and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 versions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-21fpu/softfloat: re-factor mulAlex Bennée2-128/+82
We can now add float16_mul and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 versions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-21fpu/softfloat: re-factor add/subAlex Bennée2-427/+469
We can now add float16_add/sub and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 add and sub functions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-02-21fpu/softfloat: define decompose structuresAlex Bennée1-1/+85
These structures pave the way for generic softfloat helper routines that will operate on fully decomposed numbers. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-02-21fpu/softfloat: move the extract functions to the top of the fileAlex Bennée1-66/+54
This is pure code-motion during re-factoring as the helpers will be needed earlier. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-21fpu/softfloat: improve comments on ARM NaN propagationAlex Bennée1-2/+3
Mention the pseudo-code fragment from which this is based. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21include/fpu/softfloat: add some float16 constantsAlex Bennée1-3/+5
This defines the same set of common constants for float 16 as defined for 32 and 64 bit floats. These are often used by target helper functions. I've also removed constants that are not used by anybody. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21include/fpu/softfloat: implement float16_set_sign helperAlex Bennée1-0/+5
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21include/fpu/softfloat: implement float16_chs helperAlex Bennée1-0/+9
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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