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AgeCommit message (Expand)AuthorFilesLines
2007-04-16Memory-mapped interface for PS/2 controller, by Herve Poussineau.ths2-3/+61
2007-04-16Cleanup and add more PowerPC core definitions.j_mayer1-1116/+1120
2007-04-16PowerPC 4xx software driven TLB fixes + debug traces.j_mayer3-39/+163
2007-04-16Add reset callbacks for PowerPC CPU.j_mayer6-64/+87
2007-04-16PREP and heathrow machines only support PowerPC CPU with a 6xx bus.j_mayer2-12/+44
2007-04-16Add bus model (or input pins) into PowerPC CPU flags.j_mayer4-42/+238
2007-04-16PowerPC emulation bugfixes:j_mayer1-5/+7
2007-04-16Parallel flash bugfixes:j_mayer1-12/+19
2007-04-16Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdoutj_mayer7-49/+216
2007-04-16Simplify branch likely handling.ths1-6/+8
2007-04-15Remove unused variable.pbrook1-1/+1
2007-04-15Don't use T2 for INS, it conflicts with branch delay slot handling.ths2-6/+6
2007-04-15Fix qemu SIGFPE caused by division-by-zero due to underflow.ths3-13/+28
2007-04-15Small code generation optimization.ths1-3/+6
2007-04-15Delete unused define.ths1-2/+0
2007-04-15Gallileo fixes, by Stefan Weil.ths1-4/+22
2007-04-15bFLT loader alignment fix.pbrook1-8/+11
2007-04-15Update OpenBIOS for Sparc32 and add a Sparc64 imageblueswir13-0/+1
2007-04-14Fix format specified for watchpoint address.pbrook1-1/+2
2007-04-14Fix Sparc64 double float gdb protocol (initial version by Paul Brook)blueswir11-5/+8
2007-04-14Add device save and reset methods to FDC and M48T59blueswir12-2/+136
2007-04-14Restart interrupts after an exception.ths2-9/+33
2007-04-14Know about more PCI device classes.ths1-0/+27
2007-04-14Fix incorrect pointers casts.j_mayer2-9/+9
2007-04-14Fix miscellaneous display warnings for PowerPC & alpha targetsj_mayer8-31/+46
2007-04-14Add TARGET_FMT_plx to properly display target_phys_addr_t variables.j_mayer1-0/+2
2007-04-13Nicer Log formatting.ths1-1/+1
2007-04-13Another fix for CP0 Cause register handling.ths2-2/+2
2007-04-13Fix Sparc32 device save methodsblueswir13-3/+17
2007-04-13Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS opsblueswir12-38/+111
2007-04-13Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)blueswir14-2/+18
2007-04-12Add PowerPC 405 input pins (IRQ, resets, ...) model.j_mayer5-24/+133
2007-04-12Embedded PowerPC Device Control Registers infrastructure.j_mayer4-7/+117
2007-04-11Fix bad variable name.ths1-1/+1
2007-04-11Make SYNCI_Step and CCRes CPU-specific.ths2-3/+16
2007-04-11Throw RI for invalid MFMC0-class instructions. Introduce optionalths2-3/+18
2007-04-11Code formatting fix.ths1-935/+938
2007-04-11More Context/Xcontext fixes. Ifdef some 64bit-only ops, they mayths2-10/+10
2007-04-09Implement embedded IRQ controller for PowerPC 6xx/740 & 750.j_mayer9-119/+287
2007-04-09Fix monitor disasm output for Sparc64 targetblueswir11-0/+3
2007-04-09Fix CP0_IntCtl handling.ths2-2/+6
2007-04-09Proper handling of reserved bits in the context register.ths1-1/+1
2007-04-09Mark watchpoint features as unimplemented.ths2-3/+9
2007-04-09Catch unaligned sc/scd.ths2-0/+10
2007-04-09Fix exception handling cornercase for rdhwr.ths2-37/+9
2007-04-09Remove bogus mtc0 handling.ths1-10/+0
2007-04-09ARM IRQ fix.pbrook1-1/+1
2007-04-08Fix generated code disasm output on Sparc64 hostblueswir11-0/+3
2007-04-08Sparc32/64 CPU selection for user emulatorblueswir11-0/+16
2007-04-07Fix TCX base on SS10blueswir11-1/+1
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