aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2012-10-29iov: add iov_cpyMichael S. Tsirkin2-0/+32
Add API to copy part of iovec safely. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: track host/guest header lengthMichael S. Tsirkin1-12/+17
Tracking these in device state instead of re-calculating on each packet. No functional changes. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pcie: Convert PCIExpressHost to use the QOM.Jason Baron2-0/+18
Let's use PCIExpressHost with QOM. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pcie: pass pcie window size to pcie_host_mmcfg_update()Jason Baron2-12/+16
This allows q35 to pass/set the size of the pcie window in its update routine. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: Add class 0xc05 as 'SMBus'Jan Kiszka2-0/+2
[jbaron@redhat.com: add PCI_CLASS_SERIAL_SMBUS definition] Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzleIsaku Yamahata2-0/+20
Introduce pci_swizzle_map_irq_fn() for interrupt pin swizzle which is standardized. PCI bridge swizzle is common logic, by introducing this function duplicated swizzle logic will be avoided later. [jbaron@redhat.com: drop opaque argument] Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci_ids: add intel 82801BA pci-to-pci bridge idIsaku Yamahata1-0/+1
Adds pci id constants which will be used by q35. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: pci capability must be in PCI spaceIsaku Yamahata1-3/+3
pci capability must be in PCI space. It can't lay in PCIe extended config space. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: make each capability DWORD alignedMichael S. Tsirkin1-2/+2
PCI spec (see e.g. 6.7 Capabilities List in spec rev 3.0) requires that each capability is DWORD aligned. Ensure this when allocating space by rounding size up to 4. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29qemu: enable PV EOI for qemu 1.3Michael S. Tsirkin3-14/+30
Enable KVM PV EOI by default. You can still disable it with -kvm_pv_eoi cpu flag. To avoid breaking cross-version migration, enable only for qemu 1.3 (or in the future, newer) machine type. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: Return PCI_INTX_DISABLED when no bus INTx routing supportAlex Williamson1-1/+7
Rather than assert, simply return PCI_INTX_DISABLED when we don't have a pci_route_irq_fn. PIIX already returns DISABLED for an invalid pin, so users already deal with this state. Users of this interface should only be acting on an ENABLED or INVERTED return value (though we really have no support for INVERTED). Also complain loudly when we hit this so we don't forget it's missing. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-10-29pci-assign: Use msi_get_message()Alex Williamson1-4/+1
pci-assign only uses a subset of the flexibility msi_get_message() provides, but it's still worthwhile to use it. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29msi: Add msi_get_message()Alex Williamson2-16/+30
vfio-pci and pci-assign both do this on their own for setting up direct MSI injection through KVM. Provide a helper function for this in MSI code. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci-assign: Use pci_intx_route_changed()Alex Williamson1-2/+1
Replace open coded version Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29pci: Helper function for testing if an INTx route changedAlex Williamson2-0/+6
Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agrafAurelien Jarno37-341/+785
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (22 commits) PPC: pseries: Remove hack for PIO window PPC: e500: Map PIO space into core memory region xen_platform: convert PIO to new memory api read/write vmport: convert PIO to new memory api read/write serial: convert PIO to new memory api read/write rtl8139: convert PIO to new memory api read/write pckbd: convert PIO to new memory api read/write pc port92: convert PIO to new memory api read/write mc146818rtc: convert PIO to new memory api read/write m48t59: convert PIO to new memory api read/write i8254: convert PIO to new memory api read/write es1370: convert PIO to new memory api read/write virtio-pci: convert PIO to new memory api read/write ac97: convert PIO to new memory api read/write pseries: Implement qemu initiated shutdowns using EPOW events target-ppc: Rework storage of VPA registration state pseries: Don't allow duplicate registration of hcalls or RTAS calls Add USB option in machine options e500: Fix serial initialization PPC: 440: Emulate DCBR0 ...
2012-10-29Merge branch 'queue/qmp' of git://repo.or.cz/qemu/qmp-unstableAurelien Jarno6-26/+32
* 'queue/qmp' of git://repo.or.cz/qemu/qmp-unstable: migration: go to paused state after finishing incoming migration with -S qmp: handle stop/cont in INMIGRATE state hmp: fix info cpus for sparc targets
2012-10-29PPC: pseries: Remove hack for PIO windowAlexander Graf2-44/+2
Now that all users of old_portio are gone, we can remove the hack that enabled us to support them. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29PPC: e500: Map PIO space into core memory regionAlexander Graf2-4/+8
On PPC, we don't have PIO. So usually PIO space behind a PCI bridge is accessible via MMIO. Do this mapping explicitly by mapping the PIO space of our PCI bus into a memory region that lives in memory space. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29xen_platform: convert PIO to new memory api read/writeAlexander Graf1-10/+38
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29vmport: convert PIO to new memory api read/writeAlexander Graf1-9/+12
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29serial: convert PIO to new memory api read/writeAlexander Graf1-13/+17
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29rtl8139: convert PIO to new memory api read/writeAlexander Graf1-42/+36
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29pckbd: convert PIO to new memory api read/writeAlexander Graf1-21/+27
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29pc port92: convert PIO to new memory api read/writeAlexander Graf1-8/+11
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29mc146818rtc: convert PIO to new memory api read/writeAlexander Graf1-8/+11
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29m48t59: convert PIO to new memory api read/writeAlexander Graf1-10/+14
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29i8254: convert PIO to new memory api read/writeAlexander Graf1-9/+11
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29es1370: convert PIO to new memory api read/writeAlexander Graf1-10/+36
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29virtio-pci: convert PIO to new memory api read/writeAlexander Graf1-77/+49
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29ac97: convert PIO to new memory api read/writeAlexander Graf1-20/+89
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29pseries: Implement qemu initiated shutdowns using EPOW eventsDavid Gibson4-2/+342
At present, using 'system_powerdown' from the monitor or otherwise instructing qemu to (cleanly) shut down a pseries guest will not work, because we did not have a method of signalling the shutdown request to the guest. PAPR does include a usable mechanism for this, though it is rather more involved than the equivalent on x86. This involves sending an EPOW (Environmental and POwer Warning) event through the PAPR event and error logging mechanism, which also has a number of other functions. This patch implements just enough of the event/error logging functionality to be able to send a shutdown event to the guest. At least with modern guest kernels and a userspace that is up and running, this means that system_powerdown from the qemu monitor should now work correctly on pseries guests. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29target-ppc: Rework storage of VPA registration stateDavid Gibson3-19/+21
With PAPR guests, hypercalls allow registration of the Virtual Processor Area (VPA), SLB shadow and dispatch trace log (DTL), each of which allow for certain communication between the guest and hypervisor. Currently, we store the addresses of the three areas and the size of the dtl in CPUPPCState. The SLB shadow and DTL are variable sized, with the size being retrieved from within the registered memory area at the hypercall time. This size can later be overwritten with other information, however, so we need to save the size as of registration time. We already do this for the DTL, but not for the SLB shadow, so this patch fixes that. In addition, we change the storage of the VPA information to use fixed size integer types which will make life easier for syncing this data with KVM, which we will need in future. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29pseries: Don't allow duplicate registration of hcalls or RTAS callsDavid Gibson2-2/+10
Currently the pseries machine code allows a callback to be registered for a hypercall number twice, as long as it's the same callback the second time. We don't test for duplicate registrations of RTAS callbacks at all so it will effectively be last registratiojn wins. This was originally done because it was awkward to ensure that the registration happened exactly once, but the code has since been restructured so that's no longer the case. Duplicate registration of a hypercall or RTAS call could well suggest a duplicate initialization which could cause other problems, so this patch makes duplicate registrations a bug, to prevent the old behaviour from hiding other bugs. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29Add USB option in machine optionszhlcindy@gmail.com12-28/+48
When -usb option is used, global varible usb_enabled is set. And all the plaform will create one USB controller according to this variable. In fact, global varibles make code hard to read. So this patch is to remove global variable usb_enabled and add USB option in machine options. All the plaforms will get USB option value from machine options. USB option of machine options will be set either by: * -usb * -machine type=pseries,usb=on Both these ways can work now. They both set USB option in machine options. In the future, the first way will be removed. Signed-off-by: Li Zhang <zhlcindy@linux.vnet.ibm.com> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29e500: Fix serial initializationBharat Bhushan1-1/+1
it was wrongly using serial_hds[0] instead of serial_hds[1] Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29PPC: 440: Emulate DCBR0Alexander Graf1-1/+1
The DCBR0 register on 440 is used to implement system reset. The same register is used on 405 as well, so just reuse the code. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29PPC: Bamboo: Fix memory size DT propertyAlexander Graf1-1/+1
Device tree properties need to be specified in big endian. Fix the bamboo memory size property accordingly. Signed-off-by: Alexander Graf <agraf@suse.de> CC: qemu-stable@nongnu.org
2012-10-29Drop unnecessary check of TARGET_PHYS_ADDR_SPACE_BITSPeter Maydell1-2/+0
For all our PPC targets the physical address space is at least 36 bits, so drop an unnecessary preprocessor conditional check on TARGET_PHYS_ADDR_SPACE_BITS (erroneously introduced as part of the change from target_phys_addr_t to hwaddr). This brings this bit of code into line with the way we handle the other cases which were originally checking TARGET_PHYS_ADDR_BITS in order to avoid compiler complaints about overflowing a 32 bit type. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-28target-i386: cpu: recover items 28-31 of ext2_feature_nameEduardo Habkost1-0/+1
I removed a line by mistake on commit 3b671a40cab2404bc63e57db8cd3afa4ec70bfab, containing the flags lm/i64, 3dnow, and 3dnowext. This patch restores the removed line. Reviewed-by: Don Slutz <Don@cloudswitch.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28qemu-timer: Check for usable fields for SIGEV_THREAD_IDRichard Henderson2-2/+24
Older glibc (RHEL 5.x, Debian 5.x) does not have the _sigev_un._tid member in its structure definition, while the accompanying kernel headers do define SIGEV_THREAD_ID. We need configure to check for both before using it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg-i386: Use %gs prefixes for x86_64 GUEST_BASERichard Henderson1-56/+97
When we allocate a reserved_va for the guest, the kernel will likely choose an address well above 4G. At which point we must use a pair of movabsq+addq to form the host address. If we have OS support, set up a segment register to point to guest_base instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-mips: Use TCG registers for the FPU.Richard Henderson1-42/+54
With normal FP, this doesn't have much affect on the generated code, because most of the FP operations are not CONST/PURE, and so we spill registers in about the same frequency as the explicit load/stores. But with Loongson multimedia instructions, which are all integral and whose helpers are in fact CONST+PURE, this greatly improves the code. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: remove compatiblity call flagsAurelien Jarno1-4/+0
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-xtensa: rename helper flagsAurelien Jarno1-8/+8
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-sparc: rename helper flagsAurelien Jarno1-25/+25
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Acked-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-sh4: rename helper flagsAurelien Jarno1-3/+3
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-s390x: rename helper flagsAurelien Jarno1-38/+38
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Cc: Alexander Graf <agraf@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-ppc: rename helper flagsAurelien Jarno1-19/+19
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Cc: Alexander Graf <agraf@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-mips: rename helper flagsAurelien Jarno1-53/+53
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
generated by cgit v1.1 at 2025-01-06 07:38:24 +0000