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2014-01-08softfloat: Provide complete set of accessors for fp statePeter Maydell2-18/+36
2014-01-08softfloat: Fix float64_to_uint32_round_to_zeroTom Musta1-8/+7
2014-01-08softfloat: Fix float64_to_uint32Tom Musta1-8/+7
2014-01-08softfloat: Fix float64_to_uint64_round_to_zeroTom Musta1-7/+5
2014-01-08softfloat: Add float32_to_uint64()Tom Musta2-0/+47
2014-01-08softfloat: Fix factor 2 error for scalbn on denormal inputsPeter Maydell1-8/+21
2014-01-08softfloat: Only raise Invalid when conversions to int are out of rangePeter Maydell1-12/+16
2014-01-08softfloat: Fix float64_to_uint64Tom Musta1-8/+93
2014-01-08softfloat: Make the int-to-float functions take exact-width typesPeter Maydell2-26/+26
2014-01-08softfloat: Add 16 bit integer to float conversionsPeter Maydell1-0/+21
2014-01-08softfloat: Add float to 16bit integer conversions.Will Newton2-0/+84
2014-01-08softfloat: Fix exception flag handling for float32_to_float16()Peter Maydell1-39/+66
2014-01-08hw: arm_gic: Introduce gic_set_priority functionChristoffer Dall2-5/+11
2014-01-08arm_gic: Rename GIC_X_TRIGGER to GIC_X_EDGE_TRIGGERChristoffer Dall4-12/+12
2014-01-08target-arm: fix build with gcc 4.8.2Michael S. Tsirkin1-0/+6
2014-01-08arm/xilinx_zynq: Always instantiate the GEMsPeter Crosthwaite1-11/+6
2014-01-08target-arm: remove raw_read|write duplicationPeter Crosthwaite1-10/+2
2014-01-08target-arm: use c13_context field for CONTEXTIDRSergey Fedorov1-1/+1
2014-01-08char/cadence_uart: Implement Tx flow controlPeter Crosthwaite1-2/+29
2014-01-08char/cadence_uart: Delete redundant rx rst logicPeter Crosthwaite1-2/+0
2014-01-08char/cadence_uart: Use the TX fifo for transmissionPeter Crosthwaite1-1/+16
2014-01-08char/cadence_uart: Fix can_receive logicPeter Crosthwaite1-1/+9
2014-01-08char/cadence_uart: Remove TX timer & add TX FIFO statePeter Crosthwaite1-31/+13
2014-01-08char/cadence_uart: Define Missing SR/ISR fieldsPeter Crosthwaite1-0/+4
2014-01-08char/cadence_uart: Simplify status generationPeter Crosthwaite1-25/+8
2014-01-08char/cadence_uart: s/r_fifo/rx_fifoPeter Crosthwaite1-4/+4
2014-01-08char/cadence_uart: Fix reset.Peter Crosthwaite1-3/+4
2014-01-08char/cadence_uart: Add missing uart_update_statePeter Crosthwaite1-0/+1
2014-01-08char/cadence_uart: Mark struct fields as public/privatePeter Crosthwaite1-0/+2
2014-01-08target-arm: Give the FPSCR rounding modes namesAlexander Graf2-4/+13
2014-01-08target-arm: A64: Add support for floating point cond selectClaudio Fontana1-1/+44
2014-01-08target-arm: A64: Add support for floating point conditional compareClaudio Fontana1-1/+34
2014-01-08target-arm: A64: Add support for floating point compareClaudio Fontana3-1/+113
2014-01-08target-arm: A64: Add fmov (scalar, immediate) instructionAlexander Graf1-1/+31
2014-01-08target-arm: A64: Add "Floating-point data-processing (3 source)" insnsAlexander Graf1-1/+94
2014-01-08target-arm: A64: Add "Floating-point data-processing (2 source)" insnsAlexander Graf1-1/+181
2014-01-08target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell4-52/+20
2014-01-08target-arm: A64: Fix vector register access on bigendian hostsPeter Maydell1-34/+35
2014-01-08target-arm: A64: Add support for dumping AArch64 VFP register stateAlexander Graf1-0/+16
2014-01-08default-configs: Add config for aarch64-linux-userPeter Maydell1-0/+3
2014-01-08.travis.yml: Add aarch64-* targetsAlex Bennée1-0/+1
2014-01-08linux-user: AArch64: Use correct values for FPSR/FPCR in sigcontextWill Newton1-3/+7
2014-01-08linux-user: AArch64: define TARGET_CLONE_BACKWARDSClaudio Fontana1-0/+1
2014-01-08target-arm: A64: support for ld/st/cl exclusiveMichael Matz2-6/+277
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell4-46/+64
2014-01-08target-arm: aarch64: add support for ld litAlexander Graf1-2/+45
2014-01-08target-arm: A64: add support for conditional compare insnsClaudio Fontana1-13/+60
2014-01-08target-arm: A64: add support for add/sub with carryClaudio Fontana1-2/+103
2014-01-07target-arm: Widen thread-local register state fields to 64 bitsPeter Maydell5-13/+36
2014-01-07target-arm: A64: Implement minimal set of EL0-visible sysregsPeter Maydell3-1/+115
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