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2025-07-30target/riscv: Fix exception type when VU accesses supervisor CSRsXu Lu1-1/+1
When supervisor CSRs are accessed from VU-mode, a virtual instruction exception should be raised instead of an illegal instruction. Fixes: c1fbcecb3a (target/riscv: Fix csr number based privilege checking) Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Reviewed-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Message-ID: <20250708060720.7030-1-luxu.kernel@bytedance.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30riscv: Revert "Generate strided vector loads/stores with tcg nodes."Daniel Henrique Barboza1-273/+50
This reverts commit 28c12c1f2f50d7f7f1ebfc587c4777ecd50aac5b. As reported in [1] this commit is breaking Linux vector code, and although a simpler reproducer was provided, the fix itself isn't trivial due to the amount and the nature of the changes. And we really do not want to keep Linux broken while we work on it. The revert will fix Linux and will give us time to do a proper fix. [1] https://mail.gnu.org/archive/html/qemu-devel/2025-07/msg02525.html Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Tested-by: Eric Biggers <ebiggers@kernel.org> Message-ID: <20250710100525.372985-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30target/riscv: do not call GETPC() in check_ret_from_m_mode()Daniel Henrique Barboza1-6/+9
GETPC() should always be called from the top level helper, e.g. the first helper that is called by the translation code. We stopped doing that in commit 3157a553ec, and then we introduced problems when unwinding the exceptions being thrown by helper_mret(), as reported by [1]. Call GETPC() at the top level helper and pass the value along. [1] https://gitlab.com/qemu-project/qemu/-/issues/3020 Suggested-by: Richard Henderson <richard.henderson@linaro.org> Fixes: 3157a553ec ("target/riscv: Add Smrnmi mnret instruction") Closes: https://gitlab.com/qemu-project/qemu/-/issues/3020 Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250714133739.1248296-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30linux-user/strace.list: add riscv_hwprobe entryDaniel Henrique Barboza1-0/+3
We're missing a strace entry for riscv_hwprobe, and using -strace will report it as "Unknown syscall 258". After this patch we'll have: $ ./build/qemu-riscv64 -strace test_mutex_riscv 110182 riscv_hwprobe(0x7f207efdc700,1,0,0,0,0) = 0 110182 brk(NULL) = 0x0000000000082000 (...) Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250728170633.113384-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30intc/riscv_aplic: Fix target register read when source is inactiveYang Jialong1-1/+5
The RISC-V Advanced interrupt Architecture: 4.5.16. Interrupt targets: If interrupt source i is inactive in this domain, register target[i] is read-only zero. Signed-off-by: Yang Jialong <z_bajeer@yeah.net> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20250728055114.252024-1-z_bajeer@yeah.net> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30tests/data/acpi/riscv64: Update expected FADT and MADTSunil V L3-2/+0
Update the expected tables for the version change. /* * * ACPI Data Table [FACP] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex) */ [000h 0000 004h] Signature : "FACP" [Fixed ACPI Description Table (FADT)] [004h 0004 004h] Table Length : 00000114 [008h 0008 001h] Revision : 06 -[009h 0009 001h] Checksum : 13 +[009h 0009 001h] Checksum : 12 [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 [024h 0036 004h] FACS Address : 00000000 [028h 0040 004h] DSDT Address : 00000000 [02Ch 0044 001h] Model : 00 [02Dh 0045 001h] PM Profile : 00 [Unspecified] [02Eh 0046 002h] SCI Interrupt : 0000 [030h 0048 004h] SMI Command Port : 00000000 [034h 0052 001h] ACPI Enable Value : 00 [035h 0053 001h] ACPI Disable Value : 00 [036h 0054 001h] S4BIOS Command : 00 [037h 0055 001h] P-State Control : 00 @@ -86,33 +86,33 @@ Use APIC Physical Destination Mode (V4) : 0 Hardware Reduced (V5) : 1 Low Power S0 Idle (V5) : 0 [074h 0116 00Ch] Reset Register : [Generic Address Structure] [074h 0116 001h] Space ID : 00 [SystemMemory] [075h 0117 001h] Bit Width : 00 [076h 0118 001h] Bit Offset : 00 [077h 0119 001h] Encoded Access Width : 00 [Undefined/Legacy] [078h 0120 008h] Address : 0000000000000000 [080h 0128 001h] Value to cause reset : 00 [081h 0129 002h] ARM Flags (decoded below) : 0000 PSCI Compliant : 0 Must use HVC for PSCI : 0 -[083h 0131 001h] FADT Minor Revision : 05 +[083h 0131 001h] FADT Minor Revision : 06 [084h 0132 008h] FACS Address : 0000000000000000 [...] /* * * ACPI Data Table [APIC] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex) */ [000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)] [004h 0004 004h] Table Length : 00000074 -[008h 0008 001h] Revision : 06 -[009h 0009 001h] Checksum : B4 +[008h 0008 001h] Revision : 07 +[009h 0009 001h] Checksum : B3 [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [...] Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Message-ID: <20250724110350.452828-4-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30hw/riscv/virt-acpi-build.c: Update FADT and MADT versionsSunil V L1-15/+10
RISC-V support is added only in ACPI 6.6. According to the ACPI 6.6 specification, the minor version of the Fixed ACPI Description Table (FADT) should be 6, and the Multiple APIC Description Table (MADT) should use revision 7. So, update the RISC-V FADT and MADT to reflect correct versions. Update the code comments to reflect ACPI 6.6 version details. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Message-ID: <20250724110350.452828-3-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30bios-tables-test-allowed-diff.h: Allow RISC-V FADT and MADT changesSunil V L1-0/+2
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Message-ID: <20250724110350.452828-2-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-30target/riscv: Fix pmp range wraparound on zeroVac Chen1-3/+4
pmp_is_in_range() prefers to match addresses within the interval [start, end]. To archieve this, pmpaddrX is decremented during the end address update. In TOR mode, a rule is ignored if its start address is greater than or equal to its end address. However, if pmpaddrX is set to 0, this decrement operation causes the calulated end address to wrap around to UINT_MAX. In this scenario, the address guard for this PMP entry would become ineffective. This patch addresses the issue by moving the guard check earlier, preventing the problematic wraparound when pmpaddrX is zero. Signed-off-by: Vac Chen <vacantron@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250706065554.42953-1-vacantron@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-29Update version for the v10.1.0-rc1 releasev10.1.0-rc1Stefan Hajnoczi1-1/+1
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-29Merge tag 'pull-qapi-2025-07-29' of https://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi12-17/+13
QAPI patches for 2025-07-29 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmiIxAYSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTmvEP/iYxb+1mNWLimDE/Q0nO89KDBvxLMsIr # +Z/dB4GTffvfITX5bxlzf4CaivCBGxoV02kFnzhYVHNYZD9CFA7pPwKySg2kpOeh # NIrR7OAI9/W7H+uOyZslU78HhFSoKSfeYWssXnRyrXKPFXwyO7eJacXY9YlMz2ap # A1aQT843I60ldsW2/7oJ4wy/TwHnIwXwFyBXSuKq7447LpospXDXdNdaghEjxTsQ # LkYKcmSVgonCGnZf43OyiITdkXRdttZUoSQTMKJWBzg2UZkikqDeUt67t3XYkjWk # irvBnF0lt2oEbmyeuWNciEkI5/fyoENh0bNeLWDAKwEqDf2Dc3s19/SYV8y8N3pY # UuJRPSeJ4m2cNGv/5SU8C72GMMxcP50Usrk9JvJ1ZhS7C/rWXENC1CTm4uZDkJ0t # TJt0KC4lFW0wDoXMQv1zWSXqri6+n7Ts1iYsHq5jEpDPNvQB7TGHA1VN2FBipN2d # FXFCKWfpIxYbXsAh32mAUe1wiEkZTQdBZ/ZFFNRupMgg34B7X9gGg0kUBY161IfJ # x2N9/508kgCWppz5AR8Y3sniLGtWv0KMwfQcLK1392w8AcuhVSnmejY3SUaXlmGE # JRTqnMgo1EvS/7+We5OV1NuAbHbsk/bQUeN4ZDAkzQFAQscJvCQD/uD7jzY4xBFr # 4LhegQM8eG57 # =Opw0 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 29 Jul 2025 08:52:22 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-qapi-2025-07-29' of https://repo.or.cz/qemu/armbru: MAINTAINERS: Cover docs/devel/qapi-domain.rst properly docs/qapi-domain: Fix typos tests/qapi-schema: Bury dead test case doc-non-first-section qapi/accelerator: Fix markup of heading qapi: Add more cross-references Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-29Merge tag 'hw-misc-20250729' of https://github.com/philmd/qemu into stagingStefan Hajnoczi9-34/+30
Misc HW patches - Fix MIPS MVPControl.EVP update - Fix qxl_unpack_chunks() chunk size calculation - Fix Cadence GEM register mask initialization - Fix AddressSpaceDispatch use after free - Fix building npcm7xx/npcm8xx bootroms - Include missing headers # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmiItwoACgkQ4+MsLN6t # wN5OGw//SFNgCvin6ic3H+QoUNwrRAH7eFuVfAKSKGopSqWf19imHy8rZl/8DYeo # WsCRUPkVcAGzgRHZFc+8VYGdSR5GW7AulSzHh7fGQ8EFNunu3cnGsDflVV6UjgRP # wnCfFuyrnyGfXVWkkjWYqCLI78AR0hB0Gp1E5nR4ZwGM4OhatDjKpYxWlRZbnjSA # pBArLw8eKUrq90RekVpsa15oF9eMU89HzDBfxYvk0tb4//BWBiWfgQ+cz7j9f1wC # wtTOEQ2BTkvGhqhe9VacV4YpQDXE9comlTked48GzHGqsAgp55NcB6FAR438qiG1 # 3z7LpL4LQn39+oC0S9cR2OahIGFEveOvGJoj014Iny4QR/ghNzt3F2Z9tgPISIKj # MhJ0Bu7K7X+RWikY9xiAu24ORrRd5O6EItgLsl+24vkySOKODZ85WdKtIx0DQ7Yj # rvRTkFDs/3K3kzMfZ20Jpeu7Bc74qUgsii27rivM/9rN0R9w+Br8MWLe0QSFalUe # 08NoRZMVuSPCWlvJGGb0SRYpVAZsZaE9Ucd8wQzEcjHdVu0/+7KQfACXrJ09Y8sq # lTgytCL8gO2jSEAh4cN/Ds1uBc8X5KKL32hNzRgddZVujqAuriBjAYEEk1pc7qe4 # yBxVkhASOpY53b1O2UqanajT2vY4T3JX5w+Jqn1HubZ/ZUwcK64= # =H2Ie # -----END PGP SIGNATURE----- # gpg: Signature made Tue 29 Jul 2025 07:56:58 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20250729' of https://github.com/philmd/qemu: hw/display/sm501: fix missing error-report.h roms/Makefile: fix npcmNxx_bootrom build rules system/physmem: fix use-after-free with dispatch hw/xen/passthrough: add missing error-report include hw/net/cadence_gem: fix register mask initialization migration: rename target.c to vfio.c hw/vfio/vfio-migration: Remove unnecessary 'qemu/typedefs.h' include hw/display/qxl-render: fix qxl_unpack_chunks() chunk size calculation target/mips: Only update MVPControl.EVP bit if executed by master VPE Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-29Merge tag 'pull-vfio-20250729' of https://github.com/legoater/qemu into stagingStefan Hajnoczi11-17/+48
vfio queue: * Fixed regression introduced by the `use-legacy-x86-rom` property * Fixed regressions on IGD passthrough in legacy mode * Fixed region mappings of sub-page BARs after CPR * Removed build of SEV on 32-bit hosts # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmiIaXIACgkQUaNDx8/7 # 7KHEUw//S/9+Aw7sHI0dLvYLLxMUfoDHY2B7nx/o3EgDMc3we4L19+t9d2RTxsc0 # QLz1wufhWn4gGIrb46fwqaU1ggu9cHi0o0E57cU+ZeADe/H9YRdFQ1q88yUzBARd # /exYAMV9L9NejzA/gvJDr2pZgf5ZZGY8H2MoiYw21z5nGJXlCS+1kXah7rZPHRcu # NEPw9jqab78jvHoFK1L1EaRCPN/qTaU8XGCFguDP0icFZCGnu4pIMHHQC6Btcjft # 2k5FDkQ9bzYqpq9W0KLimREBCnhmvBnCVSG/KTf/gsU222anGGgS8+80OABG7xrZ # 6LjFsBor2vKRhZ1JsL21BANg7M9iLPe3CB8KOgNdWl+RIkNfbUvt/tOqlAQgw9EI # JN7g9Ru1B0JVg18SHkTQ6/5eiWxnYRZvQA3R0BJXF23f2qqUtCm9VsQFUfYppc92 # Ci/hEtCXej8HoiJFK4gUHLYKRtk4DGbpiWgx1FYLid0ks5I+31m6x/PUMSvUbJez # oeKv5oCjvl3ORGrjpiDSA2O3gIEiMSru6jejN0RKEeRpSWOMcEsGPL7nySJaZElR # PrR/Cw+n4brTTIwUw7VnpeJnQ+XQbxD6wEzcDB7ZZ+gVs7BvmMT2LeDHzhPcaJuf # vDsTSss+YBSDCC8TCmcWPGOQB5SHPRNO/5aMPyYLulfa+VnHQmY= # =kKby # -----END PGP SIGNATURE----- # gpg: Signature made Tue 29 Jul 2025 02:25:54 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-vfio-20250729' of https://github.com/legoater/qemu: vfio/igd: Fix VGA regions are not exposed in legacy mode vfio/igd: Require host VGA decode for legacy mode vfio: fix sub-page bar after cpr i386: Build SEV only for 64-bit target hw/i386: Fix 'use-legacy-x86-rom' property compatibility Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-29MAINTAINERS: Cover docs/devel/qapi-domain.rst properlyMarkus Armbruster1-0/+1
Section QAPI already covers it, and that's fine. It's missing from "Sphinx documentation configuration and build machinery". Add it there. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250729091642.3513895-3-armbru@redhat.com> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> [Improved commit message]
2025-07-29docs/qapi-domain: Fix typosMarkus Armbruster1-2/+2
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250729091642.3513895-2-armbru@redhat.com> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
2025-07-29tests/qapi-schema: Bury dead test case doc-non-first-sectionMarkus Armbruster3-7/+0
The test passed when it was added. However, the commit adding it neglected to make Meson aware of it, so it never ran automatically. The test stopped making sense when we changed headings markup, and ceased to pass then. It should've been removed then. Do that now. Fixes: 6c10778826a8 (docs/sphinx: remove special parsing for freeform sections) Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250724091742.1950167-3-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2025-07-29qapi/accelerator: Fix markup of headingMarkus Armbruster1-1/+3
The docs generated for qapi/accelerator.json shows text "= Accelerators" instead of a heading. This is because the patch that added the heading crossed with the commit that changed heading markup (commit 6c10778826a "docs/sphinx: remove special parsing for freeform sections"). Fix the markup. Fixes: 18da42ee4273 (qapi/accel: Move definitions related to accelerators in their own file) Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250724091742.1950167-2-armbru@redhat.com>
2025-07-29qapi: Add more cross-referencesMarkus Armbruster6-7/+7
We recently (merge commit 504632dcc631) enclosed command and type names in `backquotes`, so they become links in generated HTML. Take care of a few we missed. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250717115751.3832597-1-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2025-07-29hw/display/sm501: fix missing error-report.hClément Chigot1-0/+1
"qemu/error-report.h" was previously implicitly included. This is no longer the case following 012842c075520dbe1bd96a2fdcf4e218874ba443. However, the issue predates this change as `error-report.h` should have been included when the `warn_report` call was introduced. Fixes: fa140b9562 ("hw/sm501: allow compiling without PIXMAN") Signed-off-by: Clément Chigot <chigot@adacore.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250728090518.963573-1-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-29roms/Makefile: fix npcmNxx_bootrom build rulesMichael Tokarev1-4/+4
Since commit 70ce076fa6dff60, the actual rom source dirs are subdirs of vbootrom/ submodule, not in top-level of it. Fixes: 70ce076fa6dff60 "roms: Update vbootrom to 1287b6e" Fixes: 269b7effd90 ("pc-bios: Add NPCM8XX vBootrom") Cc: qemu-stable@nongnu.org Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250727215511.807880-1-mjt@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-29system/physmem: fix use-after-free with dispatchPierrick Bouvier1-12/+3
A use-after-free bug was reported when booting a Linux kernel during the pci setup phase. It's quite hard to reproduce (needs smp, and favored by having several pci devices with BAR and specific Linux config, which is Debian default one in this case). After investigation (see the associated bug ticket), it appears that, under specific conditions, we might access a cached AddressSpaceDispatch that was reclaimed by RCU thread meanwhile. In the Linux boot scenario, during the pci phase, memory region are destroyed/recreated, resulting in exposition of the bug. The core of the issue is that we cache the dispatch associated to current cpu in cpu->cpu_ases[asidx].memory_dispatch. It is updated with tcg_commit, which runs asynchronously on a given cpu. At some point, we leave the rcu critial section, and the RCU thread starts reclaiming it, but tcg_commit is not yet invoked, resulting in the use-after-free. It's not the first problem around this area, and commit 0d58c660689 [1] ("softmmu: Use async_run_on_cpu in tcg_commit") already tried to address it. It did a good job, but it seems that we found a specific situation where it's not enough. This patch takes a simple approach: remove the cached value creating the issue, and make sure we always get the current mapping for address space, using address_space_to_dispatch(cpu->cpu_ases[asidx].as). It's equivalent to qatomic_rcu_read(&as->current_map)->dispatch; This is not really costly, we just need two dereferences, including one atomic (rcu) read, which is negligible considering we are already on mmu slow path anyway. Note that tcg_commit is still needed, as it's taking care of flushing TLB, removing previously mapped entries. Another solution would be to cache directly values under the dispatch (dispatch themselves are not ref counted), keep an active reference on associated memory section, and release it when appropriate (tricky). Given the time already spent debugging this area now and previously, I strongly prefer eliminating the root of the issue, instead of adding more complexity for a hypothetical performance gain. RCU is precisely used to ensure good performance when reading data, so caching is not as beneficial as it might seem IMHO. [1] https://gitlab.com/qemu-project/qemu/-/commit/0d58c660689f6da1e3feff8a997014003d928b3b Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3040 Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Tested-by: Michael Tokarev <mjt@tls.msk.ru> Message-ID: <20250724161142.2803091-1-pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-29hw/xen/passthrough: add missing error-report includeAdam Williamson1-0/+1
In commit cfcacbab38e ("xen/passthrough: use gsi to map pirq when dom0 is PVH") an `error_report` was added to this file, but the corresponding include of `qemu/error-report.h` was missed. This only becomes apparent when building against Xen 4.20+ with trace backend log disabled. Fixes: cfcacbab38e4 (xen/passthrough: use gsi to map pirq when dom0 is PVH) Signed-off-by: Adam Williamson <awilliam@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250717220207.171040-1-awilliam@redhat.com> [PMD: Improved commit description, added Fixes: tag] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-29hw/net/cadence_gem: fix register mask initializationLuc Michel1-1/+1
The gem_init_register_masks function was called at init time but it relies on the num-priority-queues property. Call it at realize time instead. Cc: qemu-stable@nongnu.org Fixes: 4c70e32f05f ("net: cadence_gem: Define access permission for interrupt registers") Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> Message-ID: <20250716095432.81923-2-luc.michel@amd.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-29migration: rename target.c to vfio.cPierrick Bouvier2-2/+2
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20250725201729.17100-3-pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-29hw/vfio/vfio-migration: Remove unnecessary 'qemu/typedefs.h' includePhilippe Mathieu-Daudé1-1/+0
"qemu/typedefs.h" is already included by "qemu/osdep.h". Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250708085859.7885-3-philmd@linaro.org>
2025-07-29hw/display/qxl-render: fix qxl_unpack_chunks() chunk size calculationMichael Tokarev1-1/+10
In case of multiple chunks, code in qxl_unpack_chunks() takes size of the wrong (next in the chain) chunk, instead of using current chunk size. This leads to wrong number of bytes being copied, and to crashes if next chunk size is larger than the current one. Based on the code by Gao Yong. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1628 Tested-by: Thaddeus Hogan <thaddeus@thogan.com> Tested-by: Vadim Zeitlin <vadim@wxwidgets.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250221134856.478806-1-mjt@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-29target/mips: Only update MVPControl.EVP bit if executed by master VPEPhilippe Mathieu-Daudé1-14/+18
According to the 'MIPS MT Application-Specific Extension' manual: If the VPE executing the instruction is not a Master VPE, with the MVP bit of the VPEConf0 register set, the EVP bit is unchanged by the instruction. Modify the DVPE/EVPE opcodes to only update the MVPControl.EVP bit if executed on a master VPE. Cc: qemu-stable@nongnu.org Reported-by: Hansni Bu Buglink: https://bugs.launchpad.net/qemu/+bug/1926277 Fixes: f249412c749 ("mips: Add MT halting and waking of VPEs") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-ID: <20210427133343.159718-1-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-28vfio/igd: Fix VGA regions are not exposed in legacy modeTomita Moeko3-6/+18
In commit a59d06305fff ("vfio/pci: Introduce x-pci-class-code option"), pci_register_vga() has been moved ouside of vfio_populate_vga(). As a result, IGD VGA ranges are no longer properly exposed to guest. To fix this, call pci_register_vga() after vfio_populate_vga() legacy mode. A wrapper function vfio_pci_config_register_vga() is introduced to handle it. Fixes: a59d06305fff ("vfio/pci: Introduce x-pci-class-code option") Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250723160906.44941-3-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-28vfio/igd: Require host VGA decode for legacy modeTomita Moeko2-5/+7
Commit a59d06305fff ("vfio/pci: Introduce x-pci-class-code option") allows user to expose non-VGA IGD device as VGA controller to the guest. However, legacy mode requires host VGA range access. Check that GGC.IVD == 0 before enabling legacy mode to ensure IGD is a real VGA device claiming host VGA ranges. Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250723160906.44941-2-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-28vfio: fix sub-page bar after cprSteve Sistare3-0/+17
Regions for sub-page BARs are normally mapped here, in response to the guest writing to PCI config space: vfio_pci_write_config() pci_default_write_config() pci_update_mappings() memory_region_add_subregion() vfio_sub_page_bar_update_mapping() ... vfio_dma_map() However, after CPR, the guest does not reconfigure the device and the code path above is not taken. To fix, in vfio_cpr_pci_post_load, call vfio_sub_page_bar_update_mapping for each sub-page BAR with a valid address. Fixes: 7e9f21411302 ("vfio/container: restore DMA vaddr") Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Link: https://lore.kernel.org/qemu-devel/1752520890-223356-1-git-send-email-steven.sistare@oracle.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-28i386: Build SEV only for 64-bit targetCédric Le Goater1-1/+1
Recent changes broke build on 32-bit host. Since there is no 32-bit support, restrict SEV to 64-bit. Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250716071554.377356-1-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-28hw/i386: Fix 'use-legacy-x86-rom' property compatibilityCédric Le Goater6-6/+6
Commit 350785d41d8b ("ramfb: Add property to control if load the romfile") introduced the `use-legacy-x86-rom` property for the `vfio-pci-nohotplug` device, allowing control over VGA BIOS ROM loading. However, the property compatibility setting was incorrectly applied to the `vfio-pci` device instead, which causes all `vfio-pci` devices to fail to load. This change fixes the issue by ensuring the property is set on the correct device. Fixes: d5fcf0d960d8 ("hw/i386: Add the ramfb romfile compatibility") Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Shaoqin Huang <shahuang@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250723062714.1245826-1-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-28Merge tag 'pull-qga-2025-07-28' of https://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi1-67/+42
QGA documentation patches for 2025-07-28 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmiHY8cSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTNgQP/3VZHHJtEqhGil+7ugTXffciJfBKZCkQ # K1SpEjp0BQX3DPycLek3/gz39X0S8HpvNOkLPZ8qXpZVKRHK9Qoqc0ad+RuSqoGn # 6O8prUQgfw1Cva4ZYB9Hg7hqKM1ABBv4wBJ1elNppYl9Gy0VZANkGTRnnf0226hZ # Vf422Drwi4FR632r//teKC1DIDu1Gr23x4eZi6XIW2ooXWYShrmd8l/iYS6zERa4 # f6PidxkRWtmTspVT/yNlzgxYezzdlGy3sSQ1YAZldVQBp4w7bnoQZjcdX8x55GJU # 6CYwxf4rkHZ069uGVSM2bWJ1i47uVdu0ehIytKB69tGKdppspTwHGWpnfqH9k1lq # W/S5PIF732IWw4EZhhnxB2UIDP2D4bAywoHEY6DJ67m2oJG+Jr7aSO7SRMGSBAL3 # 7YCcWDKAbgINjzagPHKWeatmklOYdnFKIRihyM5D1N26DZE1Tzxv+PztGMgSl0vv # /mR3wR8Nhjt90QxW0yKuyjbXDopSBQhXSavPYnxV5QSp/elVJa6mxaFaahCv838t # WX8DQIeLja0d7rLjVr4jqbWIa0Zj4G6yftxrUTiaAyAu8bVyDp4S3FBBfOg16x44 # iPYk3BUM5YsxhgPPvahgHlD4vyPf8HvzJqn2CByW8a+iSF4upVGnSl2JU+olyC/+ # MgFRqRgBbnJU # =86XO # -----END PGP SIGNATURE----- # gpg: Signature made Mon 28 Jul 2025 07:49:27 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-qga-2025-07-28' of https://repo.or.cz/qemu/armbru: qga: Add cross-references qga: Rephrase return docs to avoid type name qga: Remove trivial "Returns:" sections qga: Fix guest-network-get-route return value documentation Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-28Merge tag 'pull-10.1-rc1-maintainer-260725-1' of ↵Stefan Hajnoczi11-58/+192
https://gitlab.com/stsquad/qemu into staging documentation and test cleanups - improve clarity of user-mode docs - remove reference to TAP tarball - add new hypervisor test for aarch64 EL2 - reduce combinatorial explosion of plugin tests - make docker-all-test-cross more friendly to non-x86 hosts - expose unittests to sysv.args for embedded help # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmiFUdoACgkQ+9DbCVqe # KkQn+Af/RpTh4XmIcqiLvXrygLWo8hSELS0gjIRZgAA8QyBmojZ+e13los3pzm2Z # WWlQhh4T0OHgMtZCPPrP+XUc/QDgV3Pt41C1O6SWRwqD4v/7oWNNZz+pFra7x160 # CLBJfcVuRKdFzuR1NZldR8LJufmAMnPnBwE+cV9SpBlGe/lvcLPPvjF0eXQnW1yP # fWmNgf7VnLBPEQ3NQkliZ23Ku6p4yWDfJLfqgUAXe57Eom1PpDEaPlc+5UaYtAKs # ee6Gk5CqVFUhIj0v50qBn1giLyaqaXyGn9yWiwiNDL/qVV1v+DK7LNt5B0bTXCfd # X1KTwpJJdbzmcDftrAq+oacaeXryIA== # =Sxa/ # -----END PGP SIGNATURE----- # gpg: Signature made Sat 26 Jul 2025 18:08:26 EDT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-10.1-rc1-maintainer-260725-1' of https://gitlab.com/stsquad/qemu: tests/functional: expose sys.argv to unittest.main tests/docker: handle host-arch selection for all-test-cross tests/docker: add --arch-only to qemu deps for all-test-cross tests/tcg: reduce the number of plugin tests combinations configure: expose PYTHON to test/tcg/config-host.mak tests/tcg: don't include multiarch tests if not supported tests/tcg: remove ADDITIONAL_PLUGINS_TESTS tests/tcg: skip libsyscall.so on softmmu tests tests/functional: add hypervisor test for aarch64 docs/user: expand section on threading docs/user: slightly reword section on system calls docs/user: clean up headings docs/system: reword the TAP notes to remove tarball ref docs/user: clarify user-mode expects the same OS Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-28Merge tag 'pull-lu-20250726' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi1-3/+136
linux-user/aarch64: Clear TPIDR2_EL0 when delivering signals linux-user/aarch64: Support TPIDR2_MAGIC signal frame record linux-user/aarch64: Support ZT_MAGIC signal frame record # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmiF1rwdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV935wf7BXGiD3m1MfLofofa # w5/j4AjKw2sNAS3gVhmu9+BKKdctvNDxpNv4vx79j58iTuPCpi6roQ3vOEJWR0Vb # 0UdJc/vNvFrXWLTW+W5nncKjCYZeTgSbWy3xwfnR3u4fk8YkUbGjVZ9TAgXl3dA1 # NGagGqrlCqJpDYxbRWRIhXE+dF5zfNqU4gDTLG+C8xCN/gT7TkDIOU9sNb2uu1PC # eI/SplpZYBDpdzpjko35peyq0tqUJrYT6P1MMjQckGpnKTSMynQmYvKVkloALRpW # Zx3mBu9cWl77D57Fw4AijEiuUGhN0kZB12gH9VRp29rlTRr/MR4Y0seOU6XDc341 # eGe5pg== # =avvX # -----END PGP SIGNATURE----- # gpg: Signature made Sun 27 Jul 2025 03:35:24 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-lu-20250726' of https://gitlab.com/rth7680/qemu: linux-user/aarch64: Support ZT_MAGIC signal frame record linux-user/aarch64: Support TPIDR2_MAGIC signal frame record linux-user/aarch64: Clear TPIDR2_EL0 when delivering signals Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-28Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingStefan Hajnoczi1-1/+10
trivial patches for 2025-07-25 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEZKoqtTHVaQM2a/75gqpKJDselHgFAmiDqDsACgkQgqpKJDse # lHitSg//Uy6gv6Xk+Q4WW220ik9Mr0U00bJmOFiD14I3S1z7D/L8ZvjZlA85WpZs # XhSgXzHW2qFKDAz4suEh/u4p6fboYYf0r/+QiK0Qxumup23ClcClWRBQ14GVp3T4 # JXzojzJtzYTCvr0LixNHGai8ZNr8D5XsTeKH4noH9sgDC0uRS2fD20GD5AnyJiNS # sdAlfFLJM8yLSE+pgwUr06m3s/m+wn+xH5wMVr4vUzprgXxOubz4CkOyoPMIsOxZ # 679CPfsfYueEjZ6EJJHCgLwlQIXwTEfPHWkw3GMHdgHD3qbezXH4HUanRX8zK/k1 # KeDj/goeTYQuevsLss30HgxGaoEJXAS8pPmyP7biDrxfpN+aJRIJXVZbXa0bgdFW # RF6CT+kfZCyC2/kAdUlbVNvUfgsfANWD7toIRbRwcyk7awg1jUJElEbEx17DMqr3 # nCLzfFiS09Y/9c7rtLfTwyPW1k6XAr9fykVziup5KeOEQaetpPTtvV6DFqcvQ57p # OdwMZytY+f8KKctV+X0XckmDVRQu9I9/FaWsQT82sXUSI21apAwl22Vh3mRMGkHv # eHSa+I9KQwFpXEh/LE9PYWnQBR95DIuI1u2TP1tyXdu53/seUFmTUQ6JHeQynNJ3 # E25yxYzxRXwtfTINo+YWzORVe5Gie/aWek8AnC3GSQ2yaJXBCH4= # =0G1o # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Jul 2025 11:52:27 EDT # gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478 # gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [unknown] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [unknown] # gpg: aka "Michael Tokarev <mjt@tls.msk.ru>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E # Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: hw/display/qxl-render.c: fix qxl_unpack_chunks() chunk size calculation Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-28Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi9-119/+297
* rust: small cleanups + script to update packages * target/i386: AVX bugfix # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmiDfdIUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroO94Af7BJomIpZfOvtE/NJFXNfjdMrVQMhc # A1BzFahs0MY0Zg3SzVu+wQa6yG2m4sHlqFVQBBCoUCL8Fu7UQoCJesMkCvI6KQly # rZ/5Pp6zZWs4CXR+3mBsw0YqPGG/+rjPxsJf32Z04yrCFPZha7+V9Y+ABDCHv3cZ # IIRQwzIPNu0kv8qeBeXZ5ZfBghsmRiQTJTCv0agezp+5jMH1mtATLUqnKiOMLlLh # ERcw6n74bY7MXqIfFlYRfNmJ+v2jHZQbP3MhEk8ReXfhx2yC9axpppfm6a/bDjhU # iCSSgAi7+Kj/7GPp6TdDmvQTvg3tKRdiEcvnxF95EIvcsu8L8wEPNJAzFA== # =H4e7 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Jul 2025 08:51:30 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: target/i386: fix width of third operand of VINSERTx128 scripts: add script to help distros use global Rust packages rust/pl011: merge device_class.rs into device.rs rust: devices are not staticlibs Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-28qga: Add cross-referencesMarkus Armbruster1-40/+40
Enclose command and type names in `backquotes`, so they become links in generated HTML. We did this for qapi/ in merge commit 504632dcc631. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250717115246.3830007-5-armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2025-07-28qga: Rephrase return docs to avoid type nameMarkus Armbruster1-2/+1
"Returns: <description>" is rendered like Return: <Type> – <description> Mentioning the type in the description again is commonly redundant. There is just one such description. Rephrase it not to mention the type. We did this for qapi/ in commit f7296f8de5c (qapi: rephrase return docs to avoid type name). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250717115246.3830007-4-armbru@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2025-07-28qga: Remove trivial "Returns:" sectionsMarkus Armbruster1-25/+0
The QAPI doc generator recently started to auto-generate return documentation when there is no "Returns:" section (commit 636c96cd77d "qapi: Fix undocumented return values by generating something"). Remove "Returns:" sections where the auto-generated text is obviously no worse. For instance, guest-info's documentation changes from Return: GuestAgentInfo -- GuestAgentInfo to Return: GuestAgentInfo The auto-generated returns all are in the exact same spot. We did this for qapi/ in commit 0462da9d6b1 (qapi: remove trivial "Returns:" sections). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250717115246.3830007-3-armbru@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2025-07-28qga: Fix guest-network-get-route return value documentationMarkus Armbruster1-0/+1
Tagged sections are only recognized at the beginning of a paragraph. guest-network-get-route's Returns: isn't, and therefore gets rendered as ordinary text within its paragraph: Retrieve information about route of network. Returns: List of route info of guest. Since there is no (recognized) Returns: section, the doc generator adds Return: [GuestNetworkRoute] Note: only since recent commit 636c96cd77d (qapi: Fix undocumented return values by generating something). Insert the required blank line so that Returns: is recognized. Result: Retrieve information about route of network. Return: [GuestNetworkRoute] -- List of route info of guest. Fixes: commit 8e326d36dd16 (qga/linux: Add new api 'guest-network-get-route') Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250717115246.3830007-2-armbru@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2025-07-26tests/functional: expose sys.argv to unittest.mainAlex Bennée1-1/+1
With this we can call the supported we can take advantage of the argument the module supports: env PYTHONPATH=/home/alex/lsrc/qemu.git/python:/home/alex/lsrc/qemu.git/tests/functional ./pyvenv/bin/python /home/alex/lsrc/qemu.git/tests/functional/test_aarch64_kvm.py --help usage: test_aarch64_kvm.py [-h] [-v] [-q] [--locals] [--durations N] [-f] [-c] [-b] [-k TESTNAMEPATTERNS] [tests ...] positional arguments: tests a list of any number of test modules, classes and test methods. options: -h, --help show this help message and exit -v, --verbose Verbose output -q, --quiet Quiet output --locals Show local variables in tracebacks --durations N Show the N slowest test cases (N=0 for all) -f, --failfast Stop on first fail or error -c, --catch Catch Ctrl-C and display results so far -b, --buffer Buffer stdout and stderr during tests -k TESTNAMEPATTERNS Only run tests which match the given substring Examples: test_aarch64_kvm.py test_module - run tests from test_module test_aarch64_kvm.py module.TestClass - run tests from module.TestClass test_aarch64_kvm.py module.Class.test_method - run specified test method test_aarch64_kvm.py path/to/test_file.py - run tests from test_file.py usage: test_aarch64_kvm.py discover [-h] [-v] [-q] [--locals] [--durations N] [-f] [-c] [-b] [-k TESTNAMEPATTERNS] [-s START] [-p PATTERN] [-t TOP] options: -h, --help show this help message and exit -v, --verbose Verbose output -q, --quiet Quiet output --locals Show local variables in tracebacks --durations N Show the N slowest test cases (N=0 for all) -f, --failfast Stop on first fail or error -c, --catch Catch Ctrl-C and display results so far -b, --buffer Buffer stdout and stderr during tests -k TESTNAMEPATTERNS Only run tests which match the given substring -s, --start-directory START Directory to start discovery ('.' default) -p, --pattern PATTERN Pattern to match tests ('test*.py' default) -t, --top-level-directory TOP Top level directory of project (defaults to start directory) For test discovery all test modules must be importable from the top level directory of the project. Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-15-alex.bennee@linaro.org>
2025-07-26tests/docker: handle host-arch selection for all-test-crossAlex Bennée1-14/+18
When building on non-x86 we get a bunch but not all of the compilers. Handle this in the Dockerfile by probing the arch and expanding the list available. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-14-alex.bennee@linaro.org>
2025-07-26tests/docker: add --arch-only to qemu deps for all-test-crossAlex Bennée1-1/+1
If we want to build this container on non-x86 systems we might not have all the cross-compilers needed for the ROM blobs we don't actually build. Use --arch-only to avoid stalling on these missing bits. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-13-alex.bennee@linaro.org>
2025-07-26tests/tcg: reduce the number of plugin tests combinationsAlex Bennée3-12/+30
As our set of multiarch tests has grown the practice of running every plugin with every test is becoming unsustainable. If we switch to ensuring every test gets run with at least one plugin we can speed things up. Some plugins do need to be run with specific tests (for example the memory instrumentation test). We can handle this by manually adding them to EXTRA_RUNS. We also need to wrap rules in a CONFIG_PLUGIN test so we don't enable the runs when plugins are not enabled. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-12-alex.bennee@linaro.org>
2025-07-26configure: expose PYTHON to test/tcg/config-host.makAlex Bennée1-0/+1
This will be useful for making $shell calls to something more flexible than the shell builtins. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-11-alex.bennee@linaro.org>
2025-07-26tests/tcg: don't include multiarch tests if not supportedAlex Bennée2-0/+11
We are about to change the way the plugin runs are done and having this included by default will complicate things. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-10-alex.bennee@linaro.org>
2025-07-26tests/tcg: remove ADDITIONAL_PLUGINS_TESTSAlex Bennée1-2/+1
We never actually used this is the end. Remove it to enable re-factoring. Fixes: 7cefff22d54 (tests/tcg: add mechanism to run specific tests with plugins) Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-9-alex.bennee@linaro.org>
2025-07-26tests/tcg: skip libsyscall.so on softmmu testsAlex Bennée1-0/+6
It isn't testing anything and just expanding the runtime of testing. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-8-alex.bennee@linaro.org>
2025-07-26tests/functional: add hypervisor test for aarch64Alex Bennée2-0/+72
This is a simple test case that runs an image with kvmtool and kvm-unit-tests which can validate virtualisation works. This is useful for exercising TCG but can also be applied to any nested virt setup which is why it doesn't specify an accelerator. Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-7-alex.bennee@linaro.org>
generated by cgit v1.1 at 2025-09-20 22:39:04 +0000