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2022-05-16hw/virtio: move virtio-pci.h into shared include spaceAlex Bennée21-20/+20
2022-05-16vhost_net: Print feature masks in hexIlya Maximets1-2/+2
2022-05-16intel-iommu: update iq_dw during post loadJason Wang1-6/+15
2022-05-16intel-iommu: update root_scalable before switching as during post_loadJason Wang1-7/+7
2022-05-16intel-iommu: block output address in interrupt address rangeJason Wang2-1/+30
2022-05-16intel-iommu: remove VTD_FR_RESERVED_ERRJason Wang2-11/+0
2022-05-16intel_iommu: Fix irqchip / X2APIC configuration checksDavid Woodhouse1-6/+1
2022-05-16intel_iommu: Only allow interrupt remapping to be enabled if it's supportedDavid Woodhouse1-1/+3
2022-05-16intel_iommu: Support IR-only mode without DMA translationDavid Woodhouse2-4/+11
2022-05-16target/i386: Fix sanity check on max APIC ID / X2APIC enablementDavid Woodhouse3-9/+17
2022-05-13vhost: Fix element in vhost_svq_add failureEugenio Pérez1-0/+8
2022-05-13hw/virtio: Replace g_memdup() by g_memdup2()Philippe Mathieu-Daudé2-4/+5
2022-05-13vdpa: Fix index calculus at vhost_vdpa_svqs_startEugenio Pérez1-1/+1
2022-05-13vdpa: Fix bad index calculus at vhost_vdpa_get_vring_baseEugenio Pérez1-2/+2
2022-05-13vhost: Fix device's used descriptor dequeueEugenio Pérez1-2/+15
2022-05-13vhost: Track descriptor chain in private at SVQEugenio Pérez2-5/+13
2022-05-13docs/cxl: Add initial Compute eXpress Link (CXL) documentation.Jonathan Cameron2-0/+303
2022-05-13qtest/cxl: Add more complex test cases with CFMWsBen Widawsky1-3/+5
2022-05-13tests/acpi: Add tables for CXL emulation.Jonathan Cameron3-2/+0
2022-05-13qtests/bios-tables-test: Add a test for CXL emulation.Jonathan Cameron1-0/+44
2022-05-13tests/acpi: q35: Allow addition of a CXL test.Jonathan Cameron3-0/+2
2022-05-13i386/pc: Enable CXL fixed memory windowsJonathan Cameron1-1/+30
2022-05-13hw/cxl/component Add a dumb HDM decoder handlerBen Widawsky1-0/+31
2022-05-13cxl/cxl-host: Add memops for CFMWS region.Jonathan Cameron3-0/+132
2022-05-13mem/cxl_type3: Add read and write functions for associated hostmem.Jonathan Cameron2-0/+97
2022-05-13CXL/cxl_component: Add cxl_get_hb_cstate()Jonathan Cameron2-0/+9
2022-05-13pci/pcie_port: Add pci_find_port_by_pn()Jonathan Cameron2-0/+27
2022-05-13hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxlJonathan Cameron2-3/+18
2022-05-13acpi/cxl: Introduce CFMWS structures in CEDTBen Widawsky1-0/+59
2022-05-13hw/cxl/host: Add support for CXL Fixed Memory Windows.Jonathan Cameron7-0/+241
2022-05-13hw/cxl/component: Add utils for interleave parameter encoding/decodingJonathan Cameron2-0/+42
2022-05-13acpi/cxl: Create the CEDT (9.14.1)Ben Widawsky5-17/+120
2022-05-13acpi/cxl: Add _OSC implementation (9.14.2)Ben Widawsky6-6/+183
2022-05-13hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)Ben Widawsky4-10/+122
2022-05-13qtests/cxl: Add initial root port and CXL type3 testsJonathan Cameron1-0/+127
2022-05-13hw/cxl/device: Implement get/set Label Storage Area (LSA)Ben Widawsky3-1/+120
2022-05-13hw/cxl/device: Plumb real Label Storage Area (LSA) sizingBen Widawsky3-1/+22
2022-05-13hw/cxl/device: Add some trivial commandsBen Widawsky1-0/+69
2022-05-13hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12)Ben Widawsky1-0/+55
2022-05-13hw/cxl/device: Add a memory device (8.2.8.5)Ben Widawsky8-0/+269
2022-05-13hw/cxl/rp: Add a root portBen Widawsky5-2/+250
2022-05-13qtest/cxl: Introduce initial test for pxb-cxl only.Jonathan Cameron2-0/+26
2022-05-13hw/pxb: Allow creation of a CXL PXB (host bridge)Ben Widawsky4-2/+98
2022-05-13cxl: Machine level control on whether CXL support is enabledJonathan Cameron4-0/+35
2022-05-13hw/pci/cxl: Create a CXL bus typeBen Widawsky2-1/+15
2022-05-13hw/pxb: Use a type for realizing expandersBen Widawsky1-4/+7
2022-05-13hw/cxl/device: Add log commands (8.2.9.4) + CELBen Widawsky1-0/+69
2022-05-13hw/cxl/device: Timestamp implementation (8.2.9.3)Ben Widawsky2-0/+48
2022-05-13hw/cxl/device: Add cheap EVENTS implementation (8.2.9.1)Ben Widawsky1-1/+26
2022-05-13hw/cxl/device: Add memory device utilitiesBen Widawsky2-4/+55
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