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2022-04-22
target/arm: Change DisasContext.aarch64 to bool
Richard Henderson
3
-3
/
+3
2022-04-22
target/arm: Update SCTLR bits to ARMv9.2
Richard Henderson
1
-0
/
+14
2022-04-22
target/arm: Update SCR_EL3 bits to ARMv8.8
Richard Henderson
1
-0
/
+12
2022-04-22
target/arm: Update ISAR fields for ARMv8.8
Richard Henderson
1
-0
/
+24
2022-04-22
hw/arm/virt: Support TCG GICv4
Peter Maydell
3
-20
/
+67
2022-04-22
hw/arm/virt: Abstract out calculation of redistributor region capacity
Peter Maydell
2
-9
/
+11
2022-04-22
hw/arm/virt: Use VIRT_GIC_VERSION_* enum values in create_gic()
Peter Maydell
1
-8
/
+23
2022-04-22
hw/intc/arm_gicv3: Allow 'revision' property to be set to 4
Peter Maydell
2
-5
/
+12
2022-04-22
hw/intc/arm_gicv3: Update ID and feature registers for GICv4
Peter Maydell
6
-12
/
+32
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi()
Peter Maydell
1
-2
/
+5
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall()
Peter Maydell
1
-1
/
+7
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi()
Peter Maydell
1
-2
/
+18
2022-04-22
hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handling
Peter Maydell
1
-8
/
+1
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending()
Peter Maydell
1
-2
/
+21
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi()
Peter Maydell
1
-4
/
+44
2022-04-22
hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" code
Peter Maydell
1
-19
/
+30
2022-04-22
hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writes
Peter Maydell
1
-3
/
+84
2022-04-22
hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logic
Peter Maydell
1
-20
/
+46
2022-04-22
hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logic
Peter Maydell
1
-27
/
+47
2022-04-22
hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq unnecessarily
Peter Maydell
1
-5
/
+5
2022-04-22
hw/intc/arm_gicv3_cpuif: Support vLPIs
Peter Maydell
6
-6
/
+140
2022-04-22
hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update()
Peter Maydell
3
-25
/
+53
2022-04-22
hw/intc/arm_gicv3: Implement new GICv4 redistributor registers
Peter Maydell
4
-0
/
+102
2022-04-22
hw/intc/arm_gicv3: Implement GICv4's new redistributor frame
Peter Maydell
4
-5
/
+31
2022-04-22
hw/intc/arm_gicv3_its: Implement VINVALL
Peter Maydell
4
-0
/
+45
2022-04-22
hw/intc/arm_gicv3_its: Implement VMOVI
Peter Maydell
4
-0
/
+116
2022-04-22
hw/intc/arm_gicv3_its: Implement INV for virtual interrupts
Peter Maydell
3
-2
/
+31
2022-04-22
hw/intc/arm_gicv3_its: Implement INV command properly
Peter Maydell
4
-2
/
+74
2022-04-22
hw/intc/arm_gicv3_its: Implement VSYNC
Peter Maydell
3
-0
/
+13
2022-04-22
hw/intc/arm_gicv3_its: Implement VMOVP
Peter Maydell
4
-0
/
+94
2022-04-22
hw/intc/arm_gicv3: Keep pointers to every connected ITS
Peter Maydell
5
-0
/
+17
2022-04-22
hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()
Peter Maydell
4
-2
/
+125
2022-04-22
hw/intc/arm_gicv3_its: Split out process_its_cmd() physical interrupt code
Peter Maydell
1
-17
/
+32
2022-04-22
hw/intc/arm_gicv3_its: Factor out CTE lookup sequence
Peter Maydell
1
-70
/
+39
2022-04-22
hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid"
Peter Maydell
1
-50
/
+54
2022-04-22
hw/intc/arm_gicv3_its: Distinguish success and error cases of CMD_CONTINUE
Peter Maydell
1
-13
/
+16
2022-04-22
hw/intc/arm_gicv3_its: Implement VMAPP
Peter Maydell
3
-0
/
+102
2022-04-22
hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI
Peter Maydell
3
-0
/
+102
2022-04-22
hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4
Peter Maydell
3
-0
/
+42
2022-04-22
hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?"
Peter Maydell
1
-3
/
+7
2022-04-22
target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2
Peter Maydell
1
-2
/
+10
2022-04-22
hw/intc/arm_gicv3: Report correct PIDR0 values for ID registers
Peter Maydell
4
-5
/
+16
2022-04-22
hw/intc/arm_gicv3: Insist that redist region capacity matches CPU count
Peter Maydell
1
-2
/
+2
2022-04-22
hw/intc/arm_gicv3: Sanity-check num-cpu property
Peter Maydell
1
-0
/
+4
2022-04-22
hw/intc/arm_gicv3_its: Add missing blank line
Peter Maydell
1
-0
/
+1
2022-04-21
Merge tag 'pull-migration-20220421a' of https://gitlab.com/dagrh/qemu into st...
Richard Henderson
12
-238
/
+267
2022-04-21
Merge tag 'pull-rx-20220421' of https://gitlab.com/rth7680/qemu into staging
Richard Henderson
4
-33
/
+40
2022-04-21
Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into staging
Richard Henderson
32
-726
/
+423
2022-04-21
migration: Read state once
Dr. David Alan Gilbert
1
-2
/
+3
2022-04-21
migration: Fix operator type
Dr. David Alan Gilbert
1
-1
/
+1
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