riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-06-10	bsd-user/bsd-file.h: Meat of the write system calls	Warner Losh	2	-0/+106
2022-06-10	bsd-user/bsd-file.h: Add implementations for read, pread, readv and preadv	Warner Losh	2	-0/+107
2022-06-10	bsd-user/freebsd/os-syscall.c: Tracing and error boilerplate	Warner Losh	1	-4/+40
2022-06-10	bsd-user/freebsd/os-syscall.c: unlock_iovec	Warner Losh	1	-0/+14
2022-06-10	bsd-user/freebsd/os-syscall.c: lock_iovec	Warner Losh	1	-0/+102
2022-06-10	Merge tag 'pull-target-arm-20220610' of https://git.linaro.org/people/pmaydel...	Richard Henderson	16	-362/+390
2022-06-10	semihosting/config: Merge --semihosting-config option groups	Peter Maydell	1	-0/+1
2022-06-10	gdbstub: Don't use GDB syscalls if no GDB is attached	Peter Maydell	1	-3/+11
2022-06-10	target/arm: SCR_EL3.RW is RAO/WI without AArch32 EL[12]	Richard Henderson	2	-0/+9
2022-06-10	target/arm: Adjust format test in scr_write	Richard Henderson	1	-6/+8
2022-06-10	tests/qtest: Reduce npcm7xx_sdhci test image size	Hao Wu	1	-1/+1
2022-06-10	target/arm: Fix Secure PL1 tests in fp_exception_el	Richard Henderson	1	-14/+9
2022-06-10	target/arm: Move arm_debug_target_el to debug_helper.c	Richard Henderson	2	-21/+21
2022-06-10	target/arm: Create raise_exception_debug	Richard Henderson	1	-20/+24
2022-06-10	target/arm: Remove default_exception_el	Richard Henderson	3	-26/+0
2022-06-10	target/arm: Introduce helper_exception_with_syndrome	Richard Henderson	3	-5/+24
2022-06-10	target/arm: Introduce gen_exception_el_v	Richard Henderson	1	-5/+8
2022-06-10	target/arm: Introduce gen_exception	Richard Henderson	1	-4/+7
2022-06-10	target/arm: Rename gen_exception to gen_exception_el	Richard Henderson	1	-9/+9
2022-06-10	target/arm: Move gen_exception to translate.c	Richard Henderson	2	-8/+7
2022-06-10	target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_EL	Richard Henderson	5	-18/+4
2022-06-10	target/arm: Create helper_exception_swstep	Richard Henderson	3	-9/+20
2022-06-10	target/arm: Introduce gen_exception_insn	Richard Henderson	5	-29/+22
2022-06-10	target/arm: Rename gen_exception_insn to gen_exception_insn_el	Richard Henderson	6	-52/+53
2022-06-10	target/arm: Introduce gen_exception_insn_el_v	Richard Henderson	1	-15/+12
2022-06-10	target/arm: Rename helper_exception_with_syndrome	Richard Henderson	4	-10/+10
2022-06-10	target/arm: Move arm_debug_exception_fsr to debug_helper.c	Richard Henderson	2	-25/+26
2022-06-10	target/arm: Move exception_bkpt_insn to debug_helper.c	Richard Henderson	2	-29/+31
2022-06-10	target/arm: Use is_a64 in arm_generate_debug_exceptions	Richard Henderson	1	-1/+1
2022-06-10	target/arm: Move arm_generate_debug_exceptions out of line	Richard Henderson	3	-91/+95
2022-06-10	target/arm: Move arm_singlestep_active out of line	Richard Henderson	3	-10/+13
2022-06-10	target/arm: Move exception_target_el out of line	Richard Henderson	2	-15/+16
2022-06-10	target/arm: Add coproc parameter to syn_fp_access_trap	Richard Henderson	3	-6/+18
2022-06-10	target/arm: Mark exception helpers as noreturn	Richard Henderson	1	-3/+3
2022-06-09	Merge tag 'pull-riscv-to-apply-20220610' of github.com:alistair23/qemu into s...	Richard Henderson	19	-759/+1244
2022-06-10	target/riscv: trans_rvv: Avoid assert for RV32 and e64	Alistair Francis	1	-2/+10
2022-06-10	target/riscv: Don't expose the CPU properties on names CPUs	Alistair Francis	1	-11/+46
2022-06-10	target/riscv: rvv: Add option 'rvv_ta_all_1s' to enable optional tail agnosti...	eopXD	1	-0/+2
2022-06-10	target/riscv: rvv: Add tail agnostic for vector permutation instructions	eopXD	2	-2/+45
2022-06-10	target/riscv: rvv: Add tail agnostic for vector mask instructions	eopXD	2	-0/+36
2022-06-10	target/riscv: rvv: Add tail agnostic for vector reduction instructions	eopXD	1	-0/+20
2022-06-10	target/riscv: rvv: Add tail agnostic for vector floating-point instructions	eopXD	2	-196/+261
2022-06-10	target/riscv: rvv: Add tail agnostic for vector fix-point arithmetic instruct...	eopXD	1	-106/+114
2022-06-10	target/riscv: rvv: Add tail agnostic for vector integer merge and move instru...	eopXD	2	-4/+28
2022-06-10	target/riscv: rvv: Add tail agnostic for vector integer comparison instructions	eopXD	1	-0/+18
2022-06-10	target/riscv: rvv: Add tail agnostic for vector integer shift instructions	eopXD	2	-1/+13
2022-06-10	target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions	eopXD	3	-142/+190
2022-06-10	target/riscv: rvv: Add tail agnostic for vector load / store instructions	eopXD	3	-0/+68
2022-06-10	target/riscv: rvv: Add tail agnostic for vv instructions	eopXD	6	-132/+178
2022-06-10	target/riscv: rvv: Early exit when vstart >= vl	eopXD	1	-0/+27