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2022-02-17virtiofsd: Add helpers to work with /proc/self/task/tid/attr/fscreateVivek Goyal1-0/+92
2022-02-17virtiofsd: Move core file creation code in separate functionVivek Goyal1-11/+25
2022-02-17virtiofsd, fuse_lowlevel.c: Add capability to parse security contextVivek Goyal3-1/+113
2022-02-17virtiofsd: Extend size of fuse_conn_info->capable and ->want fieldsVivek Goyal2-3/+3
2022-02-17virtiofsd: Parse extended "struct fuse_init_in"Vivek Goyal1-22/+39
2022-02-17linux-headers: Update headers to v5.17-rc1Vivek Goyal26-76/+469
2022-02-17virtiofsd: Fix breakage due to fuse_init_in size changeVivek Goyal1-1/+3
2022-02-179pfs: Fix segfault in do_readdir_many caused by struct dirent overreadVitaly Chikunov5-5/+55
2022-02-17tests/9pfs: Use g_autofree and g_autoptr where possibleGreg Kurz1-9/+4
2022-02-17tests/9pfs: Fix leak of local_test_pathGreg Kurz1-0/+7
2022-02-17tests/9pfs: fix mkdir() being called twiceChristian Schoenebeck1-15/+3
2022-02-17tests/9pfs: use g_autofree where possibleChristian Schoenebeck1-63/+27
2022-02-16virtiofsd: Do not support blocking flockSebastian Hasler1-0/+9
2022-02-16Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20220...Peter Maydell27-370/+3252
2022-02-16docs/system: riscv: Update description of CPUYu Li1-3/+3
2022-02-16target/riscv: add support for svpbmt extensionWeiwei Li3-1/+6
2022-02-16target/riscv: add support for svinval extensionWeiwei Li5-0/+85
2022-02-16target/riscv: add support for svnapot extensionWeiwei Li3-3/+18
2022-02-16target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTEWeiwei Li1-0/+3
2022-02-16target/riscv: Ignore reserved bits in PTE for RV64Guo Ren3-1/+30
2022-02-16hw/intc: Add RISC-V AIA APLIC device emulationAnup Patel4-0/+1061
2022-02-16target/riscv: Allow users to force enable AIA CSRs in HARTAnup Patel2-0/+6
2022-02-16hw/riscv: virt: Use AIA INTC compatible string when availableAnup Patel1-2/+11
2022-02-16target/riscv: Implement AIA IMSIC interface CSRsAnup Patel1-0/+203
2022-02-16target/riscv: Implement AIA xiselect and xireg CSRsAnup Patel3-0/+187
2022-02-16target/riscv: Implement AIA mtopi, stopi, and vstopi CSRsAnup Patel1-0/+156
2022-02-16target/riscv: Implement AIA interrupt filtering CSRsAnup Patel1-0/+23
2022-02-16target/riscv: Implement AIA hvictl and hviprioX CSRsAnup Patel3-1/+131
2022-02-16target/riscv: Implement AIA CSRs for 64 local interrupts on RV32Anup Patel4-120/+474
2022-02-16target/riscv: Implement AIA local interrupt prioritiesAnup Patel4-21/+294
2022-02-16target/riscv: Allow AIA device emulation to set ireg rmw callbackAnup Patel2-0/+37
2022-02-16target/riscv: Add defines for AIA CSRsAnup Patel1-0/+119
2022-02-16target/riscv: Add AIA cpu featureAnup Patel1-1/+2
2022-02-16target/riscv: Allow setting CPU feature from machine/device emulationAnup Patel2-8/+8
2022-02-16target/riscv: Improve delivery of guest external interruptsAnup Patel1-0/+13
2022-02-16target/riscv: Implement hgeie and hgeip CSRsAnup Patel6-38/+121
2022-02-16target/riscv: Implement SGEIP bit in hip and hie CSRsAnup Patel3-8/+16
2022-02-16target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-modeAnup Patel1-1/+1
2022-02-16target/riscv: Fix vill field write in vtypeLIU Zhiwei1-0/+1
2022-02-16target/riscv: add a MAINTAINERS entry for XVentanaCondOpsPhilipp Tomsich1-0/+7
2022-02-16target/riscv: Add XVentanaCondOps custom extensionPhilipp Tomsich6-0/+83
2022-02-16target/riscv: iterate over a table of decodersPhilipp Tomsich1-5/+27
2022-02-16target/riscv: access cfg structure through DisasContextPhilipp Tomsich1-4/+4
2022-02-16target/riscv: access configuration through cfg_ptr in DisasContextPhilipp Tomsich4-69/+97
2022-02-16target/riscv: riscv_tr_init_disas_context: copy pointer-to-cfg into cfg_ptrPhilipp Tomsich1-0/+2
2022-02-16target/riscv: refactor (anonymous struct) RISCVCPU.cfg into 'struct RISCVCPUC...Philipp Tomsich1-37/+41
2022-02-16target/riscv: correct "code should not be reached" for x-rv128Frédéric Pétrot2-2/+4
2022-02-16Allow setting up to 8 bytes with the generic loaderPetr Tesarik1-1/+1
2022-02-16include: hw: remove ibex_plic.hWilfred Mallawa1-67/+0
2022-02-15Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request...Peter Maydell5-4/+51
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