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2018-03-07RISC-V Build InfrastructureMichael Clark12-2/+72
This adds RISC-V into the build system enabling the following targets: - riscv32-softmmu - riscv64-softmmu - riscv32-linux-user - riscv64-linux-user This adds defaults configs for RISC-V, enables the build for the RISC-V CPU core, hardware, and Linux User Emulation. The 'qemu-binfmt-conf.sh' script is updated to add the RISC-V ELF magic. Expected checkpatch errors for consistency reasons: ERROR: line over 90 characters FILE: scripts/qemu-binfmt-conf.sh Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07SiFive Freedom U Series RISC-V MachineMichael Clark2-0/+408
This provides a RISC-V Board compatible with the the SiFive Freedom U SDK. The following machine is implemented: - 'sifive_u'; CLINT, PLIC, UART, device-tree Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07SiFive Freedom E Series RISC-V MachineMichael Clark2-0/+313
This provides a RISC-V Board compatible with the the SiFive Freedom E SDK. The following machine is implemented: - 'sifive_e'; CLINT, PLIC, UART, AON, GPIO, QSPI, PWM Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07SiFive RISC-V PRCI BlockMichael Clark2-0/+126
Simple model of the PRCI (Power, Reset, Clock, Interrupt) to emulate register reads made by the SDK BSP. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07SiFive RISC-V UART DeviceMichael Clark2-0/+247
QEMU model of the UART on the SiFive E300 and U500 series SOCs. BBL supports the SiFive UART for early console access via the SBI (Supervisor Binary Interface) and the linux kernel SBI console. The SiFive UART implements the pre qom legacy interface consistent with the 16550a UART in 'hw/char/serial.c'. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stefan O'Rear <sorear2@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V VirtIO MachineMichael Clark2-0/+494
RISC-V machine with device-tree, 16550a UART and VirtIO MMIO. The following machine is implemented: - 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07SiFive RISC-V Test FinisherMichael Clark2-0/+135
Test finisher memory mapped device used to exit simulation. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V Spike MachinesMichael Clark2-0/+429
RISC-V machines compatble with Spike aka riscv-isa-sim, the RISC-V Instruction Set Simulator. The following machines are implemented: - 'spike_v1.9.1'; HTIF console, config-string, Privileged ISA Version 1.9.1 - 'spike_v1.10'; HTIF console, device-tree, Privileged ISA Version 1.10 Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07SiFive RISC-V PLIC BlockMichael Clark2-0/+590
The PLIC (Platform Level Interrupt Controller) device provides a parameterizable interrupt controller based on SiFive's PLIC specification. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stefan O'Rear <sorear2@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07SiFive RISC-V CLINT BlockMichael Clark2-0/+304
The CLINT (Core Local Interruptor) device provides real-time clock, timer and interprocessor interrupts based on SiFive's CLINT specification. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Stefan O'Rear <sorear2@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V HART ArrayMichael Clark2-0/+128
Holds the state of a heterogenous array of RISC-V hardware threads. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V HTIF ConsoleMichael Clark2-0/+319
HTIF (Host Target Interface) provides console emulation for QEMU. HTIF allows identical copies of BBL (Berkeley Boot Loader) and linux to run on both Spike and QEMU. BBL provides HTIF console access via the SBI (Supervisor Binary Interface) and the linux kernel SBI console. The HTIT chardev implements the pre qom legacy interface consistent with the 16550a UART in 'hw/char/serial.c'. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Stefan O'Rear <sorear2@gmail.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07Add symbol table callback interface to load_elfMichael Clark3-16/+53
The RISC-V HTIF (Host Target Interface) console device requires access to the symbol table to locate the 'tohost' and 'fromhost' symbols. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V Linux User EmulationMichael Clark13-6/+1012
Implementation of linux user emulation for RISC-V. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V Physical Memory ProtectionMichael Clark2-0/+444
Implements the physical memory protection extension as specified in Privileged ISA Version 1.10. PMP (Physical Memory Protection) is as-of-yet unused and needs testing. The SiFive verification team have PMP test cases that will be run. Nothing currently depends on PMP support. It would be preferable to keep the code in-tree for folk that are interested in RISC-V PMP support. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Daire McNamara <daire.mcnamara@emdalo.com> Signed-off-by: Ivan Griffin <ivan.griffin@emdalo.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V TCG Code GenerationMichael Clark2-0/+2342
TCG code generation for the RV32IMAFDC and RV64IMAFDC. The QEMU RISC-V code generator has complete coverage for the Base ISA v2.2, Privileged ISA v1.9.1 and Privileged ISA v1.10: - RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2 - RISC-V Instruction Set Manual Volume II: Privileged ISA Version 1.9.1 - RISC-V Instruction Set Manual Volume II: Privileged ISA Version 1.10 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V GDB StubMichael Clark1-0/+62
GDB Register read and write routines. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V FPU SupportMichael Clark2-3/+377
Helper routines for FPU instructions and NaN definitions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V CPU HelpersMichael Clark3-0/+1250
Privileged control and status register helpers and page fault handling. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V DisassemblerMichael Clark4-0/+3053
The RISC-V disassembler has no dependencies outside of the 'disas' directory so it can be applied independently. The majority of the disassembler is machine-generated from instruction set metadata: - https://github.com/michaeljclark/riscv-meta Expected checkpatch errors for consistency and brevity reasons: ERROR: line over 90 characters ERROR: trailing statements should be on next line ERROR: space prohibited between function name and open parenthesis '(' Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V CPU Core DefinitionMichael Clark3-0/+1139
Add CPU state header, CPU definitions and initialization routines Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V ELF Machine DefinitionMichael Clark1-0/+2
Define RISC-V ELF machine EM_RISCV 243 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07RISC-V MaintainersMichael Clark1-0/+11
Add Michael Clark, Palmer Dabbelt, Sagar Karandikar and Bastian Koppelmann as RISC-V Maintainers. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-06misc: don't use hwaddr as a type in trace eventsDaniel P. Berrangé1-2/+2
Use types that are defined by QEMU in trace events caused build failures for the UST trace backend: In file included from trace-ust-all.c:13:0: trace-ust-all.h:11844:206: error: unknown type name ‘hwaddr’ It only knows about C built-in types, and any types that are pulled in from includs of qemu-common.h and lttng/tracepoint.h. This does not include the 'hwaddr' type, so replace it with a uint64_t which is what exec/hwaddr.h defines 'hwaddr' as. This fixes the build failure introduced by commit 9eb8040c2d2b38e1a40bb6129b1b668fa178fcab Author: Peter Maydell <peter.maydell@linaro.org> Date: Fri Mar 2 10:45:39 2018 +0000 hw/misc/tz-ppc: Model TrustZone peripheral protection controller Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180306134317.836-1-berrange@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-06Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell36-352/+315
* new QMP command qom-list-properties (Alexey) * TCG cleanups (David) * use g_path_get_basename/g_path_get_dirname when useful (Julia) * WHPX fixes (Justin) * ASAN fixes (Marc-André) * g364fb memory leak fix, address_space_to_flatview RCU fixes (me) * chardev memory leak fix (Peter) * checkpatch improvements (Julia, Su Hang) * next round of deprecation patches (Thomas) # gpg: Signature made Tue 06 Mar 2018 13:11:58 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (34 commits) use g_path_get_basename instead of basename balloon: Fix documentation of the --balloon parameter and deprecate it WHPX improve interrupt notification registration WHXP Removes the use of WHvGetExitContextSize Fix WHPX issue leaking tpr values Fix WHPX typo in 'mmio' Fix WHPX additional lock acquisition Remove unnecessary WHPX __debugbreak(); Resolves WHPX breaking changes in SDK 17095 Fixing WHPX casing to match SDK Revert "build-sys: compile with -Og or -O1 when --enable-debug" checkpatch: add check for `while` and `for` checkpatch: add a warning for basename/dirname address_space_rw: address_space_to_flatview needs RCU lock address_space_map: address_space_to_flatview needs RCU lock address_space_access_valid: address_space_to_flatview needs RCU lock address_space_read: address_space_to_flatview needs RCU lock address_space_write: address_space_to_flatview needs RCU lock memory: inline some performance-sensitive accessors openpic_kvm: drop address_space_to_flatview call ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-06use g_path_get_basename instead of basenameJulia Suvorova6-12/+15
basename(3) and dirname(3) modify their argument and may return pointers to statically allocated memory which may be overwritten by subsequent calls. g_path_get_basename and g_path_get_dirname have no such issues, and therefore more preferable. Signed-off-by: Julia Suvorova <jusual@mail.ru> Message-Id: <1519888086-4207-1-git-send-email-jusual@mail.ru> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06balloon: Fix documentation of the --balloon parameter and deprecate itThomas Huth3-7/+12
There are two issues with the documentation of the --balloon parameter: First, "--balloon none" is simply doing nothing. Even if a machine had a balloon device by default, this option is not disabling anything, it is simply ignored. Thus let's simply drop this option from the documentation to avoid to confuse the users (but keep the code in vl.c for backward compatibility). Second, the documentation claims that "--balloon virtio" is the default mode, but this is not true anymore since commit 382f074371f7dc32a34. Since that commit, the option also has no real use case anymore, since you can simply use "--device virtio-balloon" nowadays instead. Thus to simplify our complex parameter zoo a little bit, let's deprecate the the parameter now and tell the user to use "--device virtio-balloon" instead. Fixes: 382f074371f7dc32a34c944c845b1698e83d8c36 Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1519796303-13257-1-git-send-email-thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06WHPX improve interrupt notification registrationJustin Terry (VM) via Qemu-devel1-4/+3
Improves the usage of the InterruptNotification registration by skipping the additional call to WHvSetVirtualProcessorRegisters if we have already registered for the window exit. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1519665216-1078-9-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Justin Terry (VM) via Qemu-devel <qemu-devel@nongnu.org>
2018-03-06WHXP Removes the use of WHvGetExitContextSizeJustin Terry (VM) via Qemu-devel1-7/+2
The use of WHvGetExitContextSize will break ABI compatibility if the platform changes the context size while a qemu compiled executable does not recompile. To avoid this we now use sizeof and let the platform determine which version of the struction was passed for ABI compatibility. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1519665216-1078-8-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Justin Terry (VM) via Qemu-devel <qemu-devel@nongnu.org>
2018-03-06Fix WHPX issue leaking tpr valuesJustin Terry (VM) via Qemu-devel1-3/+5
Fixes an issue where if the tpr is assigned to the array but not a different value from what is already expected on the vp the code will skip incrementing the reg_count. In this case its possible that we set an invalid memory section of the next call for DeliverabilityNotifications that was not expected. The fix is to use a local variable to store the temporary tpr and only update the array if the local tpr value is different than the vp context. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1519665216-1078-7-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Justin Terry (VM) via Qemu-devel <qemu-devel@nongnu.org>
2018-03-06Fix WHPX typo in 'mmio'Justin Terry (VM) via Qemu-devel1-2/+2
Renames the usage of 'memio' to 'mmio' in the emulator callbacks. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1519665216-1078-6-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Justin Terry (VM) via Qemu-devel <qemu-devel@nongnu.org>
2018-03-06Fix WHPX additional lock acquisitionJustin Terry (VM) via Qemu-devel1-2/+0
The code already is holding the qemu_mutex for the IO thread. We do not need to additionally take the lock again in this case. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1519665216-1078-5-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Justin Terry (VM) via Qemu-devel <qemu-devel@nongnu.org>
2018-03-06Remove unnecessary WHPX __debugbreak();Justin Terry (VM) via Qemu-devel1-12/+0
Minor code cleanup. The calls to __debugbreak() are not required and should no longer be used to prevent unnecessary breaks. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1519665216-1078-4-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Justin Terry (VM) via Qemu-devel <qemu-devel@nongnu.org>
2018-03-06Resolves WHPX breaking changes in SDK 17095Justin Terry (VM) via Qemu-devel1-16/+10
1. Fixes the changes required to the WHvTryMmioEmulation, WHvTryIoEmulation, and WHvEmulatorCreateEmulator based on the new VpContext forwarding. 2. Removes the WHvRunVpExitReasonAlerted case. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1519665216-1078-3-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Justin Terry (VM) via Qemu-devel <qemu-devel@nongnu.org>
2018-03-06Fixing WHPX casing to match SDKJustin Terry (VM) via Qemu-devel2-7/+7
Fixes an issue where the SDK that was releases had a different casing for the *.h and *.lib files causing a build break if linked directly from Windows Kits. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1519665216-1078-2-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Justin Terry (VM) via Qemu-devel <qemu-devel@nongnu.org>
2018-03-06Revert "build-sys: compile with -Og or -O1 when --enable-debug"Paolo Bonzini1-13/+2
This reverts commit 906548689e37ab6cca1e93b3f8d9327a4e17e8af. Even with -Og, the debug experience is noticeably worse because gdb shows a lot more "<optimised out>" variables and function arguments. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06checkpatch: add check for `while` and `for`Su Hang1-2/+3
Adding check for `while` and `for` statements, which condition has more than one line. The former checkpatch.pl can check `if` statement, which condition has more than one line, whether block misses brace round, like this: ''' if (cond1 || cond2) statement; ''' But it doesn't do the same check for `for` and `while` statements. Using `(?:...)` instead of `(...)` in regex pattern catch. Because `(?:...)` is faster and avoids unwanted side-effect. Suggested-by: Stefan Hajnoczi <stefanha@redhat.com> Suggested-by: Eric Blake <eblake@redhat.com> Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Su Hang <suhang16@mails.ucas.ac.cn> Message-Id: <1520319890-19761-1-git-send-email-suhang16@mails.ucas.ac.cn> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06checkpatch: add a warning for basename/dirnameJulia Suvorova1-0/+5
g_path_get_* do the same as g_strdup(basename/dirname(...)) but without modifying the argument. Signed-off-by: Julia Suvorova <jusual@mail.ru> Message-Id: <1519987399-19160-1-git-send-email-jusual@mail.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06address_space_rw: address_space_to_flatview needs RCU lockPaolo Bonzini1-18/+10
address_space_rw is calling address_space_to_flatview but it can be called outside the RCU lock. To fix it, transform flatview_rw into address_space_rw, since flatview_rw is otherwise unused. Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06address_space_map: address_space_to_flatview needs RCU lockPaolo Bonzini1-1/+2
address_space_map is calling address_space_to_flatview but it can be called outside the RCU lock. The function itself is calling rcu_read_lock/rcu_read_unlock, just in the wrong place, so the fix is easy. Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06address_space_access_valid: address_space_to_flatview needs RCU lockPaolo Bonzini1-4/+8
address_space_access_valid is calling address_space_to_flatview but it can be called outside the RCU lock. To fix it, push the rcu_read_lock/unlock pair up from flatview_access_valid to address_space_access_valid. Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06address_space_read: address_space_to_flatview needs RCU lockPaolo Bonzini2-28/+35
address_space_read is calling address_space_to_flatview but it can be called outside the RCU lock. To fix it, push the rcu_read_lock/unlock pair up from flatview_read_full to address_space_read's constant size fast path and address_space_read_full. Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06address_space_write: address_space_to_flatview needs RCU lockPaolo Bonzini1-15/+22
address_space_write is calling address_space_to_flatview but it can be called outside the RCU lock. To fix it, push the rcu_read_lock/unlock pair up from flatview_write to address_space_write. Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06memory: inline some performance-sensitive accessorsPaolo Bonzini3-35/+30
These accessors are called from inlined functions, and the call sequence is much more expensive than just inlining the access. Move the struct declaration to memory-internal.h so that exec.c and memory.c can both use an inline function. Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06openpic_kvm: drop address_space_to_flatview callPaolo Bonzini1-4/+0
The MemoryListener is registered on address_space_memory, there is not much to assert. This currently works because the callback is invoked only once when the listener is registered, but section->fv is the _new_ FlatView, not the old one on later calls and that would break. This confines address_space_to_flatview to exec.c and memory.c. Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06chardev: fix leak in tcp_chr_telnet_init_io()Peter Xu1-3/+7
Need to free TCPChardevTelnetInit when session established. Since at it, switch to use G_SOURCE_* macros. Reviewed-by: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20180301084438.13594-2-peterx@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06sdhci-test: fix leaksMarc-André Lureau1-0/+2
Fix the following ASAN reports: ==20125==ERROR: LeakSanitizer: detected memory leaks Direct leak of 24 byte(s) in 1 object(s) allocated from: #0 0x7f0faea03a38 in __interceptor_calloc (/lib64/libasan.so.4+0xdea38) #1 0x7f0fae450f75 in g_malloc0 ../glib/gmem.c:124 #2 0x562fffd526fc in machine_start /home/elmarco/src/qemu/tests/sdhci-test.c:180 Indirect leak of 152 byte(s) in 1 object(s) allocated from: #0 0x7f0faea03850 in malloc (/lib64/libasan.so.4+0xde850) #1 0x7f0fae450f0c in g_malloc ../glib/gmem.c:94 #2 0x562fffd5d21d in qpci_init_pc /home/elmarco/src/qemu/tests/libqos/pci-pc.c:122 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20180215212552.26997-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06ahci-test: fix opts leak of skip testsMarc-André Lureau1-0/+1
Fixes the following ASAN report: Direct leak of 128 byte(s) in 8 object(s) allocated from: #0 0x7fefce311850 in malloc (/lib64/libasan.so.4+0xde850) #1 0x7fefcdd5ef0c in g_malloc ../glib/gmem.c:94 #2 0x559b976faff0 in create_ahci_io_test /home/elmarco/src/qemu/tests/ahci-test.c:1810 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20180215212552.26997-6-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06lockable: workaround GCC link issue with ASANMarc-André Lureau1-1/+1
Current GCC has an optimization bug when compiling with ASAN. See also GCC bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84307 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20180215212552.26997-3-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-06build-sys: fix -fsanitize=address checkMarc-André Lureau1-10/+12
Since 218bb57dd79d6843e0592c30a82ea8c1fddc74a5, the -fsanitize=address check fails with: config-temp/qemu-conf.c:3:20: error: integer overflow in expression [-Werror=overflow] return INT32_MIN / -1; Interestingly, UBSAN check doesn't produce a compile time warning. Use a test that doesn't have compile time warnings, and make it specific to UBSAN check. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20180215212552.26997-2-marcandre.lureau@redhat.com> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.1 at 2025-01-16 10:34:19 +0000