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2022-09-07Merge tag 'pull-qapi-2022-09-07' of git://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi7-20/+37
2022-09-07qapi: fix examples of events missing timestampVictor Toso1-4/+23
2022-09-07qapi: fix example of query-hotpluggable-cpus commandVictor Toso1-2/+2
2022-09-07qapi: fix examples of blockdev-add with qcow2Victor Toso1-5/+5
2022-09-07qapi: fix example of MEM_UNPLUG_ERROR eventVictor Toso1-1/+1
2022-09-07qapi: fix example of DEVICE_UNPLUG_GUEST_ERROR eventVictor Toso1-2/+1
2022-09-07qapi: fix example of NIC_RX_FILTER_CHANGED eventVictor Toso1-1/+0
2022-09-07qapi: fix example of BLOCK_JOB_READY eventVictor Toso1-1/+1
2022-09-07qapi: fix example of query-dump-guest-memory-capability commandVictor Toso1-1/+1
2022-09-07qapi: fix example of query-vnc commandVictor Toso1-2/+2
2022-09-07qapi: fix example of query-ballon commandVictor Toso1-1/+1
2022-09-07Merge tag 'pull-riscv-to-apply-20220907' of https://github.com/alistair23/qem...Stefan Hajnoczi40-558/+2228
2022-09-07target/riscv: Update the privilege field for sscofpmf CSRsAtish Patra1-30/+60
2022-09-07hw/riscv: virt: Add PMU DT node to the device treeAtish Patra3-0/+74
2022-09-07target/riscv: Add few cache related PMU eventsAtish Patra1-0/+25
2022-09-07target/riscv: Simplify counter predicate functionAtish Patra1-101/+9
2022-09-07target/riscv: Add sscofpmf extension supportAtish Patra7-11/+623
2022-09-07target/riscv: Add vstimecmp supportAtish Patra6-6/+118
2022-09-07target/riscv: Add stimecmp supportAtish Patra8-1/+235
2022-09-07hw/intc: Move mtimer/mtimecmp to aclintAtish Patra6-30/+47
2022-09-07target/riscv: Use official extension names for AIA CSRsAnup Patel6-26/+31
2022-09-07target/riscv: Add xicondops in ISA entryRahul Pathak1-0/+1
2022-09-07hw/core: fix platform bus node nameConor Dooley1-1/+1
2022-09-07hw/riscv: virt: fix syscon subnode pathsConor Dooley1-2/+2
2022-09-07hw/riscv: virt: fix the plic's address cellsConor Dooley2-0/+3
2022-09-07hw/riscv: virt: fix uart node nameConor Dooley1-1/+1
2022-09-07target/riscv: Remove additional priv version check for mcountinhibitAtish Patra1-8/+0
2022-09-07hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripheralsConor Dooley2-7/+74
2022-09-07hw/riscv: opentitan: bump opentitan versionWilfred Mallawa2-9/+14
2022-09-07target/riscv: Fix priority of csr related check in riscv_csrrw_checkWeiwei Li1-19/+25
2022-09-07hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()Daniel Henrique Barboza6-9/+6
2022-09-07target/riscv: Add Zihintpause supportDao Lu4-1/+25
2022-09-07target/riscv: rvv: Add option 'rvv_ma_all_1s' to enable optional mask agnosti...eopXD1-0/+1
2022-09-07target/riscv: rvv: Add mask agnostic for vector permutation instructionsYueh-Ting (eop) Chen2-2/+25
2022-09-07target/riscv: rvv: Add mask agnostic for vector mask instructionsYueh-Ting (eop) Chen2-0/+14
2022-09-07target/riscv: rvv: Add mask agnostic for vector floating-point instructionsYueh-Ting (eop) Chen2-0/+38
2022-09-07target/riscv: rvv: Add mask agnostic for vector fix-point arithmetic instruct...Yueh-Ting (eop) Chen1-10/+16
2022-09-07target/riscv: rvv: Add mask agnostic for vector integer comparison instructionsYueh-Ting (eop) Chen2-0/+11
2022-09-07target/riscv: rvv: Add mask agnostic for vector integer shift instructionsYueh-Ting (eop) Chen2-0/+8
2022-09-07target/riscv: rvv: Add mask agnostic for vx instructionsYueh-Ting (eop) Chen2-0/+5
2022-09-07target/riscv: rvv: Add mask agnostic for vector load / store instructionsYueh-Ting (eop) Chen2-11/+29
2022-09-07target/riscv: rvv: Add mask agnostic for vv instructionsYueh-Ting (eop) Chen6-2/+20
2022-09-07docs: List kvm as a supported accelerator on RISC-VBin Meng1-1/+1
2022-09-07target/riscv: Fix typo and restore Pointer Masking functionality for RISC-VAlexey Baturo1-1/+1
2022-09-07roms/opensbi: Upgrade from v1.0 to v1.1Bin Meng3-0/+0
2022-09-07target/riscv: Simplify the check in hmode to reuse the check in riscv_csrrw_c...Weiwei Li1-13/+5
2022-09-07target/riscv: Fix checks in hmode/hmode32Weiwei Li2-7/+7
2022-09-07target/riscv: Add check for csrs existed with U extensionWeiwei Li1-3/+21
2022-09-07target/riscv: Fix checkpatch warning may triggered in csr_ops tableWeiwei Li1-207/+234
2022-09-07target/riscv: H extension depends on I extensionWeiwei Li1-0/+6
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