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2014-02-26target-arm: Implement AArch64 TLB invalidate opsPeter Maydell1-0/+73
Implement the AArch64 TLB invalidate operations. This is the full set of TLBI ops defined for a CPU which doesn't implement EL2 or EL3. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-26target-arm: Implement AArch64 cache invalidate/clean opsPeter Maydell2-2/+49
Implement all the AArch64 cache invalidate and clean ops (which are all NOPs since QEMU doesn't emulate the cache). The only remaining unimplemented cache op is DC ZVA. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2014-02-26target-arm: Implement AArch64 MIDR_EL1Peter Maydell1-0/+3
Implement the AArch64 view of the MIDR system register (for AArch64 it is a simple constant, unlike the complicated mess that TI925 imposes on the 32-bit view). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2014-02-26target-arm: Implement AArch64 CurrentEL sysregPeter Maydell3-1/+12
Implement the CurrentEL sysreg. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2014-02-26target-arm: A64: Make cache ID registers visible to AArch64Peter Maydell4-11/+25
Make the cache ID system registers (CLIDR, CSSELR, CCSIDR, CTR) visible to AArch64. These are mostly simple 64-bit extensions of the existing 32 bit system registers and so can share reginfo definitions. CTR needs to have a split definition, but we can clean up the temporary user-mode implementation in favour of using the CPU-specified reset value, and implement the system-mode-required semantics of restricting its EL0 accessibility if SCTLR.UCT is not set. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2014-02-26target-arm: Fix raw read and write functions on AArch64 registersPeter Maydell3-3/+15
The raw read and write functions were using the ARM_CP_64BIT flag in ri->type to determine whether to treat the register's state field as uint32_t or uint64_t; however AArch64 register info structs don't use that flag. Abstract out the "how big is the field?" test into a function and fix it to work for AArch64 registers. For this to work we must ensure that the reginfo structs put into the hashtable have the correct state field for their use, not the placeholder STATE_BOTH. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-26hw: arm_gic_kvm: Add KVM VGIC save/restore logicChristoffer Dall1-2/+422
Save and restore the ARM KVM VGIC state from the kernel. We rely on QEMU to marshal the GICState data structure and therefore simply synchronize the kernel state with the QEMU emulated state in both directions. We take some care on the restore path to check the VGIC has been configured with enough IRQs and CPU interfaces that we can properly restore the state, and for separate set/clear registers we first fully clear the registers and then set the required bits. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687921-26921-1-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-26arm: vgic device control api supportChristoffer Dall4-15/+80
Support creating the ARM vgic device through the device control API and setting the base address for the distributor and cpu interfaces in KVM VMs using this API. Because the older KVM_CREATE_IRQCHIP interface needs the irq chip to be created prior to creating the VCPUs, we first test if we can use the device control API in kvm_arch_irqchip_create (using the test flag from the device control API). If we cannot, it means we have to fall back to KVM_CREATE_IRQCHIP and use the older ioctl at this point in time. If however, we can use the device control API, we don't do anything and wait until the arm_gic_kvm driver initializes and let that use the device control API. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687720-26806-5-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-26kvm: Common device control API functionsChristoffer Dall3-0/+62
Introduces two simple functions: int kvm_device_ioctl(int fd, int type, ...); int kvm_create_device(KVMState *s, uint64_t type, bool test); These functions wrap the basic ioctl-based interactions with KVM in a way similar to other KVM ioctl wrappers. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687720-26806-4-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-26kvm: Introduce kvm_arch_irqchip_createChristoffer Dall4-2/+29
Introduce kvm_arch_irqchip_create an arch-specific hook in preparation for architecture-specific use of the device control API to create IRQ chips. Following patches will implement the ARM irqchip create method to prefer the device control API over the older KVM_CREATE_IRQCHIP API. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687720-26806-3-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-26linux-headers: Update from v3.14-rc3Christoffer Dall5-4/+74
Update to tag v3.14-rc3 (6d0abeca3242a88cab8232e4acd7e2bf088f3bc2) Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687720-26806-2-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-26hw/intc/arm_gic: Fix GIC_SET_LEVELChristoffer Dall1-1/+1
The GIC_SET_LEVEL macro unfortunately overwrote the entire level bitmask instead of just or'ing on the necessary bits, causing active level PPIs on a core to clear PPIs on other cores. Cc: qemu-stable@nongnu.org Reported-by: Rob Herring <rob.herring@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1393031030-8692-1-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-26target-arm: Load correct access bits from ARMv5 level 2 page table descriptorsPeter Maydell1-1/+1
In ARMv5 level 2 page table descriptors, each 4K or 64K page is split into four subpages, each of which can have different access permission settings, which are specified by four two-bit fields in the l2 descriptor. A long-standing cut-and-paste error meant we were using the wrong bits in the virtual address to select the access-permission field for 4K pages. The error has presumably not been noticed before because most guests don't make use of the ability to set the access permissions differently for each 1K subpage: if the guest gives the whole page the same access permissions it doesn't matter which of the 4 AP fields we select. (The whole issue is irrelevant for ARMv7 CPUs anyway because subpages aren't supported there.) Reported-by: Vivek Rai <Vivek.Rai@emulex.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1392667690-8731-1-git-send-email-peter.maydell@linaro.org
2014-02-26hw/arm/musicpal: Remove nonexistent CDTP2, CDTP3 registersPeter Maydell1-4/+2
The ethernet device in the musicpal only has two tx queues, but we modelled it with four CTDP registers, presumably a cut and paste from the rx queue registers. Since the tx_queue[] array is only 2 entries long this allowed a guest to overrun this buffer. Remove the nonexistent registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1392737293-10073-1-git-send-email-peter.maydell@linaro.org Acked-by: Jan Kiszka <jan.kiszka@web.de> Cc: qemu-stable@nongnu.org
2014-02-26hw/intc/exynos4210_combiner: Don't overrun output_irq array in initPeter Maydell1-1/+1
The Exynos4210 combiner has IIC_NIRQ inputs and IIC_NGRP outputs; use the correct constant in the loop initializing our output sysbus IRQs so that we don't overrun the output_irq[] array. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1392659611-8439-1-git-send-email-peter.maydell@linaro.org Reviewed-by: Andreas Färber <afaerber@suse.de> Cc: qemu-stable@nongnu.org
2014-02-26target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS opsPeter Maydell1-2/+2
Correct some obviously nonsensical bit manipulation spotted by Coverity when constructing the short-form PAR value for ATS operations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1392659525-8335-1-git-send-email-peter.maydell@linaro.org
2014-02-26hw/timer/arm_timer: Avoid array overrun for bad addressesPeter Maydell1-0/+2
The integrator's timer read/write functions log an error for bad addresses in guest accesses, but were falling through and using an out of bounds array index rather than returning early. Fix this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Message-id: 1392647854-8067-4-git-send-email-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org
2014-02-26hw/net/stellaris_enet: Avoid unintended sign extensionPeter Maydell1-1/+2
Add a cast to avoid an unintended sign extension that would mean we returned 0xffffffff in the high 32 bits for an IA0 read if bit 31 in the MAC address was 1. (This is harmless since we'll only be doing 4 byte reads, but it could be confusing, so best avoided.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Message-id: 1392647854-8067-3-git-send-email-peter.maydell@linaro.org
2014-02-26hw/misc/arm_sysctl: Fix bad boundary check on mb clock accessesPeter Maydell1-2/+2
Fix incorrect use of sizeof() rather than ARRAY_SIZE() to guard accesses into the mb_clock[] array, which was allowing a malicious guest to overwrite the end of the array. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Message-id: 1392647854-8067-2-git-send-email-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org
2014-02-26xilinx: Delete hw/include/xilinx.hPeter Crosthwaite4-13/+1
This is now obsolete - remove the header and all its inclusions. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-26xilinx: Inline usages of xilinx_axi*_init()Peter Crosthwaite2-38/+19
Inline the only usage of each of xilinx_axiethernet_init and xilinx_axidma_init. Converts this init to at least a semi-recent QOM styling. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-26xilinx: Inline usage of xilinx_ethlite_create()Peter Crosthwaite2-20/+8
Inline the only usage. Converts this init to at least a semi-recent QOM styling. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-26xilinx: Inline usages of xilinx_timer_create()Peter Crosthwaite4-18/+20
Inline these usages. Converts these init to at least a semi-recent QOM styling. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-26xilinx: Inline usages of xilinx_intc_create()Peter Crosthwaite4-18/+18
Inline these usages. Converts these init to at least a semi-recent QOM styling. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-26microblaze/ml605: Define macros for irq/memory mapsPeter Crosthwaite1-3/+12
Define (missing) macros for the interrupt and memory maps for the sake of self documentation. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-26ppc/virtex_ml507: Define macros for irq/memory mapsPeter Crosthwaite1-3/+11
Define macros for the interrupt and memory maps for the sake of self documentation. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-26microblaze/s3adsp_1800: Define macros for irq mapPeter Crosthwaite1-1/+6
Define macros for the interrupt map for the sake of self documentation. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-25modules: do not include gmodule-2.0 in static buildsPaolo Bonzini2-1/+10
gmodule-2.0's pkg-config files include -Wl,--export-dynamic, which breaks static builds. It is a glib bug, but we need to support --static builds for the linux-user targets, and in the end all that is needed to fix this is: * outlaw --enable-modules --static, which makes little sense anyway * only include gmodule-2.0's cflags and ldflags if --enable-modules is specified on the command line. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1393346215-5636-1-git-send-email-pbonzini@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-25Merge remote-tracking branch 'remotes/spice/tags/pull-spice-3' into stagingPeter Maydell1-1/+7
qxl: add sanity check # gpg: Signature made Mon 24 Feb 2014 12:01:27 GMT using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/spice/tags/pull-spice-3: qxl: add sanity check Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-25Merge remote-tracking branch 'remotes/mdroth/qga-pull-2014-02-24' into stagingPeter Maydell7-78/+132
* remotes/mdroth/qga-pull-2014-02-24: qemu-ga: isa-serial support on Windows qga: Fix memory allocation pasto qga: Don't require 'time' argument in guest-set-time command qga: vss-win32: Fix interference with snapshot deletion by other VSS request qga: vss-win32: Fix interference with snapshot creation by other VSS requesters qga: vss-win32: Use NULL as an invalid pointer for OpenEvent and CreateEvent Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-25Merge remote-tracking branch 'remotes/xtensa/tags/20140224-xtensa' into stagingPeter Maydell42-63/+332
Xtensa fixes and improvements queue 2014-02-24: - add support for ML605 and KC705 FPGA boards; - flush opencores_eth queue when new RX descriptor is available; - add basic checks to cache opcodes; - make core configuration available to tests; - implement HW config ID special registers. # gpg: Signature made Mon 24 Feb 2014 00:52:42 GMT using RSA key ID F83FA044 # gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" * remotes/xtensa/tags/20140224-xtensa: target-xtensa: provide HW confg ID registers target-xtensa: refactor standard core configuration target-xtensa: add basic tests for cache opcodes target-xtensa: allow using core configuration in tests target-xtensa: add overridable test_init macro target-xtensa: add basic checks to icache opcodes target-xtensa: add basic checks to dcache opcodes target-xtensa: add RRRI4 opcode format fields opencores_eth: flush queue whenever can_receive can go from false to true hw/xtensa: add support for ML605 and KC705 FPGA board Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-25Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell50-635/+2820
Block patches # gpg: Signature made Fri 21 Feb 2014 21:42:24 GMT using RSA key ID C88F2FD6 # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" * remotes/kevin/tags/for-upstream: (54 commits) iotests: Mixed quorum child device specifications quorum: Simplify quorum_open() quorum: Add unit test. quorum: Add quorum_open() and quorum_close(). quorum: Implement recursive .bdrv_recurse_is_first_non_filter in quorum. quorum: Add quorum_co_flush(). quorum: Add quorum_invalidate_cache(). quorum: Add quorum_getlength(). quorum: Add quorum mechanism. quorum: Add quorum_aio_readv. blkverify: Extract qemu_iovec_clone() and qemu_iovec_compare() from blkverify. quorum: Add quorum_aio_writev and its dependencies. quorum: Create BDRVQuorumState and BlkDriver and do init. quorum: Create quorum.c, add QuorumChildRequest and QuorumAIOCB. check-qdict: Test termination of qdict_array_split() check-qdict: Adjust test for qdict_array_split() qdict: Extract non-QDicts in qdict_array_split() qemu-config: Sections must consist of keys qemu-iotests: Check qemu-img command line parsing qemu-img: Allow -o help with incomplete argument list ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-24Merge remote-tracking branch 'remotes/sstabellini/xen-140220' into stagingPeter Maydell4-4/+16
* remotes/sstabellini/xen-140220: xen_disk: fix io accounting Call pci_piix3_xen_ide_unplug from unplug_disks Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-24Merge remote-tracking branch 'remotes/bonzini/configure' into stagingPeter Maydell21-127/+541
* remotes/bonzini/configure: build: softmmu targets do not have a "main.o" file configure: Disable libtool if -fPIE does not work with it (bug #1257099) block: convert block drivers linked with libs to modules Makefile: introduce common-obj-m and block-obj-m for DSO Makefile: install modules with "make install" module: implement module loading rules.mak: introduce DSO rules darwin: do not use -mdynamic-no-pic block: use per-object cflags and libs rules.mak: allow per object cflags and libs rules.mak: fix $(obj) to a real relative path util: Split out exec_dir from os_find_datadir Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-24configure: check that C++ compiler actually worksPeter Maydell1-0/+29
Check that the C++ compiler works with the C compiler; if it does not, then don't pass CXX to the build process. This fixes a regression where QEMU was no longer building if the build environment didn't have a C++ compiler (introduced in commit 3144f78b, which incorrectly assumed that rules.mak would only see a non-empty $(CXX) if configure had actually found a working C++ compiler). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reported-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reported-by: Thomas Huth <thuth@linux.vnet.ibm.com> Tested-by: Thomas Huth <thuth@linux.vnet.ibm.com> Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1392909016-14028-1-git-send-email-peter.maydell@linaro.org
2014-02-24qxl: add sanity checkGerd Hoffmann1-1/+7
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2014-02-24target-xtensa: provide HW confg ID registersMax Filippov4-3/+21
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: refactor standard core configurationMax Filippov4-21/+13
Coalesce all standard configuration sections into single DEFAULT_SECTIONS macro for all cores. This allows to add new features in a single place: overlay_tool.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: add basic tests for cache opcodesMax Filippov2-0/+98
Test that non-locking prefetch operations don't cause exceptions on missing TLB and that other 'hit' cache operations do. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: allow using core configuration in testsMax Filippov30-32/+37
Add path to the core configuration directory to test build command and replace .include asm directive with #include to enable preprocessing. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: add overridable test_init macroMax Filippov2-2/+6
Some test suites, like MMU, need per-test initialization. Don't make them redefine test macro, add test_init for that purpose. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: add basic checks to icache opcodesMax Filippov3-0/+33
Check privilege level for privileged instructions (IHU, III, IIU and IPFL are privileged), memory accessibility for instructions that reference memory (IH* and IPFL) and windowed register validity for all instruction cache instructions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: add basic checks to dcache opcodesMax Filippov1-0/+38
Check privilege level for privileged instructions (DHI, DHU, DII, DIU, DIWB, DIWBI, DPFL are privileged), memory accessibility for instructions that reference memory (all DH* and DPFL) and windowed register validity for all data cache instructions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: add RRRI4 opcode format fieldsMax Filippov1-0/+9
This encoding is used by cache instructions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24opencores_eth: flush queue whenever can_receive can go from false to trueMax Filippov1-2/+31
The following registers control whether MAC can receive frames: - MODER.RXEN bit that enables/disables receiver; - TX_BD_NUM register that specifies number of RX descriptors. Notify QEMU networking core when the MAC is ready to receive frames. Discard frame and raise BUSY interrupt when the frame arrives but the current RX descriptor is not empty. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-24hw/xtensa: add support for ML605 and KC705 FPGA boardMax Filippov1-4/+47
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
2014-02-23qemu-ga: isa-serial support on WindowsMiki Mishael2-6/+31
Add support for isa-serial method for qemu-ga on Windows, Added -p command line parameter for serial port name specification, e.g. "-p COM15". Signed-off-by: Miki Mishael <mmishael@redhat.com> Signed-off-by: Dmitry Fleytman <dfleytma@redhat.com> *added default isa-serial path to help output Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2014-02-23qga: Fix memory allocation pastoMarkus Armbruster1-1/+1
qmp_guest_file_seek() allocates memory for a GuestFileRead object instead of the GuestFileSeek object it actually uses. Harmless, because the GuestFileRead is slightly larger. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2014-02-23qga: Don't require 'time' argument in guest-set-time commandMichal Privoznik3-29/+51
As the description to the guest-set-time states, the command is there to ease time synchronization after resume. If guest was suspended for longer period of time, its system time can go off so badly, that even NTP refuses to set it. That's why the command was invented: to give users chance to set the time (not necessarily 100% correct). However, there's is no real need for us to require users to pass an arbitrary time. Especially if we can read the correct value from RTC (boiling down to reading host's time). Hence this commit enables logic: guest-set-time() == guest-set-time($now_from_rtc) Signed-off-by: Michal Privoznik <mprivozn@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2014-02-23qga: vss-win32: Fix interference with snapshot deletion by other VSS requestTomoki Sekiyama1-1/+3
When a VSS requester such as vshadow.exe or diskshadow.exe requests to delete snapshots, qemu-ga VSS provider's DeleteSnapshots() is also called and returns E_NOTIMPL, that makes the deletion fail. To avoid this issue, return S_OK and set values that represent no snapshots are deleted by qemu-ga VSS provider. Signed-off-by: Tomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: Gal Hammer <ghammer@redhat.com> Reviewed-by: Yan Vugenfirer <yvugenfi@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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