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2018-08-21linux-user: Propagate goto unimplemented_nowarn to returnRichard Henderson1-7/+4
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180818190118.12911-6-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-08-21linux-user: Propagate goto efault to returnRichard Henderson1-166/+175
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180818190118.12911-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-08-21linux-user: Relax single exit from "break"Richard Henderson1-582/+390
Transform outermost "break" to "return ret". If the immediately preceeding statement was an assignment to ret, return the value directly. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180818190118.12911-4-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-08-21linux-user: Split out do_syscall1Richard Henderson1-29/+48
There was supposed to be a single point of return for do_syscall so that tracing works properly. However, there are a few bugs in that area. It is significantly simpler to simply split out an inner function to enforce this. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180818190118.12911-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-08-21linux-user: Remove DEBUGRichard Henderson1-10/+0
This is redundant with both -strace and actual tracing. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180818190118.12911-2-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-08-21Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180821-pull-request' ↵Peter Maydell5-181/+30
into staging hw/display: misc fixes # gpg: Signature made Tue 21 Aug 2018 09:16:01 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20180821-pull-request: hw/pci-host/bonito: Move away from old_mmio accessors hw/display/vga-isa-mm: Convert away from old_mmio qxl: drop unused generation variable hw/display/ramfb: Compile the ramfb code only when CONFIG_FW_CFG_DMA is set Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-21Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180821' ↵Peter Maydell31-735/+945
into staging ppc patch queue 2018-08-21 Here's my first ppc & spapr pull request for qemu-3.1. This contains a bunch of things that have accumulated while 3.0 was in freeze. Highlights are: * SLOF firmware update * A number of floating point cleanups from Richard Henderson and Yasmin Beatriz * A new model for assigning irq numbers on spapr, this is an important preliminary step towards implementing the POWER9 "XIVE" interrupt controller # gpg: Signature made Tue 21 Aug 2018 05:32:44 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.1-20180821: (26 commits) ppc: add DBCR based debugging spapr_pci: factorize the use of SPAPR_MACHINE_GET_CLASS() mac_newworld: don't use legacy fw_cfg_init_mem() function mac_oldworld: don't use legacy fw_cfg_init_mem() function 40p: don't use legacy fw_cfg_init_mem() function qemu-doc: mark ppc/prep machine as deprecated hw/ppc: deprecate the machine type 'prep', replaced by '40p' spapr: introduce a IRQ controller backend to the machine hw/ppc/ppc405_uc: Convert away from old_mmio hw/ppc/ppc_boards: Don't use old_mmio for ref405ep_fpga hw/ppc/prep: Remove ifdeffed-out stub of XCSR code spapr: introduce a fixed IRQ number space spapr: Add a pseries-3.1 machine type target/ppc: simplify bcdadd/sub functions xics: don't include "target/ppc/cpu-qom.h" in "hw/ppc/xics.h" vfio/spapr: Allow backing bigger guest IOMMU pages with smaller physical pages target/ppc: bcdsub fix sign when result is zero target/ppc: Use non-arithmetic conversions for fp load/store target/ppc: Honor fpscr_ze semantics and tidy fre, fresqrt target/ppc: Tidy helper_fsqrt ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-21Merge remote-tracking branch ↵Peter Maydell5-26/+150
'remotes/vivier2/tags/linux-user-for-3.1-pull-request' into staging linux-user fixes: - netlink fixes (add missing types, fix MSG_TRUNC) - sh4 fix (tcg state) - sparc32plus fix (truncate address space to 32bit) - add x86_64 binfmt data # gpg: Signature made Mon 20 Aug 2018 21:24:40 BST # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-3.1-pull-request: linux-user: add QEMU_IFLA_INFO_KIND nested type for tun linux-user: update netlink route types linux-user: introduce QEMU_RTA_* to use with rtattr_type_t linux-user: fix recvmsg()/recvfrom() with netlink and MSG_TRUNC sh4: fix use_icount with linux-user linux-user: fix 32bit g2h()/h2g() qemu-binfmt-conf.sh: add x86_64 target Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-21Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell12-36/+235
pc: fixes This includes nvdimm persistence fixes queued before the release. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 20 Aug 2018 11:38:11 BST # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: migration/ram: ensure write persistence on loading all data to PMEM. migration/ram: Add check and info message to nvdimm post copy. mem/nvdimm: ensure write persistence to PMEM in label emulation hostmem-file: add the 'pmem' option configure: add libpmem support memory, exec: switch file ram allocation functions to 'flags' parameters memory, exec: Expose all memory block related flags. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-21Merge remote-tracking branch ↵Peter Maydell2-3/+13
'remotes/mcayland/tags/qemu-sparc.for-upstream-20180820' into staging qemu-sparc.for-upstream queue # gpg: Signature made Mon 20 Aug 2018 19:38:04 BST # gpg: using RSA key 5BC2C56FAE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc.for-upstream-20180820: sun4m: don't use legacy fw_cfg_init_mem() function sun4u: ensure kernel_top is always initialised Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-21hw/pci-host/bonito: Move away from old_mmio accessorsPeter Maydell1-130/+15
Move away from the old_mmio MemoryRegion accessors in the bonito pci controller. This device is used only in the MIPS "fulong2e" machine. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180802155147.1863-3-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-08-21hw/display/vga-isa-mm: Convert away from old_mmioPeter Maydell1-47/+13
Convert the vga-isa-mm device away from the old_mmio MemoryRegion accessors. This device is only used by the MIPS 'jazz' boards "magnum" and "pica61". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Tested-by: Hervé Poussineau <hpoussin@reactos.org> Message-id: 20180802155147.1863-2-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-08-21qxl: drop unused generation variableGerd Hoffmann2-2/+0
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180810132236.25908-1-kraxel@redhat.com
2018-08-21hw/display/ramfb: Compile the ramfb code only when CONFIG_FW_CFG_DMA is setThomas Huth1-2/+2
According to the ramfb_setup() function, the ramfb device needs fw_cfg with DMA, so we should also only compile and link it into those targets which support it, to avoid that the device shows up on systems where it can not be used at all (e.g. s390x). Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1534786083-26559-1-git-send-email-thuth@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-08-21ppc: add DBCR based debuggingRoman Kapl4-33/+107
Add support for DBCR (debug control register) based debugging as used on BookE ppc. So far supports only branch and single-step events, but these are the important ones. GDB in Linux guest can now do single-stepping. Signed-off-by: Roman Kapl <rka@sysgo.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21spapr_pci: factorize the use of SPAPR_MACHINE_GET_CLASS()Cédric Le Goater1-5/+6
It should save us some CPU cycles as these routines perform a lot of checks. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21mac_newworld: don't use legacy fw_cfg_init_mem() functionMark Cave-Ayland1-1/+11
Instead initialise the device via qdev to allow us to set device properties directly as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21mac_oldworld: don't use legacy fw_cfg_init_mem() functionMark Cave-Ayland1-1/+11
Instead initialise the device via qdev to allow us to set device properties directly as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-2140p: don't use legacy fw_cfg_init_mem() functionMark Cave-Ayland1-2/+11
Instead initialise the device via qdev to allow us to set device properties directly as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21qemu-doc: mark ppc/prep machine as deprecatedHervé Poussineau1-0/+6
40p machine type should be used instead. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21hw/ppc: deprecate the machine type 'prep', replaced by '40p'Hervé Poussineau2-2/+1
- prep machine is a fictional machine, so has no specifications. Which devices can be changed/added/removed without impact? Are interrupts correctly mapped? - prep firmware (OHW) has support only for IDE drives (no SCSI). Booting from IDE has been broken approximatively 3 years ago, and nobody complained. - OHW is limited on IDE boot to a specific set of OS loaders. These operating systems are of the 2004 time frame. - OHW can use -kernel. Linux kernel freezes a long time after PS/2 mouse detection, and then screen becomes garbage. This was already broken in QEMU v2.7, 2 years ago, and nobody complained. On the other side: - 40p is a real machine, so emulation can be checked against hardware specifications - OpenBIOS has support for SCSI block devices, including 40p LSI adapter - OpenBIOS can start mostly all Linux kernels (including recent ones) and recent operating system (like NetBSD 7.1.2) Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> [dwg: Drop prep from boot-serial test to avoid deprecation warnings] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21spapr: introduce a IRQ controller backend to the machineCédric Le Goater5-185/+259
This proposal moves all the related IRQ routines of the sPAPR machine behind a sPAPR IRQ backend interface 'spapr_irq' to prepare for future changes. First of which will be to increase the size of the IRQ number space, then, will follow a new backend for the POWER9 XIVE IRQ controller. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21hw/ppc/ppc405_uc: Convert away from old_mmioPeter Maydell1-148/+25
Convert the devices in ppc405_uc away from using the old_mmio MemoryRegion accessors: * opba's 32-bit and 16-bit accessors were just calling the 8-bit accessors and assembling a big-endian order number, which we can do by setting the .impl.max_access_size to 1 and the endianness to DEVICE_BIG_ENDIAN, and letting the core memory code do the assembly * ppc405_gpio's accessors were all just stubs * ppc4xx_gpt's 8-bit and 16-bit accessors were treating the access as invalid, which we can do by setting the .valid.min_access_size and .valid.max_access_size fields Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21hw/ppc/ppc_boards: Don't use old_mmio for ref405ep_fpgaPeter Maydell1-50/+10
Switch the ref405ep_fpga device away from using the old_mmio MemoryRegion accessors. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21hw/ppc/prep: Remove ifdeffed-out stub of XCSR codePeter Maydell1-93/+4
The prep machine has some code which is stubs of accessors for XCSR registers. This has been disabled via #if 0 since commit b6b8bd1819ff in 2004, and doesn't have any actual interesting content. It also uses the deprecated old_mmio accessor functions. Remove it entirely. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21spapr: introduce a fixed IRQ number spaceCédric Le Goater8-18/+216
This proposal introduces a new IRQ number space layout using static numbers for all devices, depending on a device index, and a bitmap allocator for the MSI IRQ numbers which are negotiated by the guest at runtime. As the VIO device model does not have a device index but a "reg" property, we introduce a formula to compute an IRQ number from a "reg" value. It should minimize most of the collisions. The previous layout is kept in pre-3.1 machines raising the 'legacy_irq_allocation' machine class flag. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21spapr: Add a pseries-3.1 machine typeCédric Le Goater1-2/+21
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: simplify bcdadd/sub functionsYasmin Beatriz1-31/+18
After solving a corner case in bcdsub, this patch simplifies the logic of both bcdadd/sub instructions by removing some unnecessary local flags. This commit also rearranges some if-else conditions in bcdadd to make it easier to read. Signed-off-by: Yasmin Beatriz <yasmins@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21xics: don't include "target/ppc/cpu-qom.h" in "hw/ppc/xics.h"Greg Kurz1-1/+0
The last user of the PowerPCCPU typedef in "hw/ppc/xics.h" vanished with commit b1fd36c363d73969841468146ebfb9fd84a5ee52. It isn't necessary to include "target/ppc/cpu-qom.h" there anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21vfio/spapr: Allow backing bigger guest IOMMU pages with smaller physical pagesAlexey Kardashevskiy3-1/+24
At the moment the PPC64/pseries guest only supports 4K/64K/16M IOMMU pages and POWER8 CPU supports the exact same set of page size so so far things worked fine. However POWER9 supports different set of sizes - 4K/64K/2M/1G and the last two - 2M and 1G - are not even allowed in the paravirt interface (RTAS DDW) so we always end up using 64K IOMMU pages, although we could back guest's 16MB IOMMU pages with 2MB pages on the host. This stores the supported host IOMMU page sizes in VFIOContainer and uses this later when creating a new DMA window. This uses the system page size (64k normally, 2M/16M/1G if hugepages used) as the upper limit of the IOMMU pagesize. This changes the type of @pagesize to uint64_t as this is what memory_region_iommu_get_min_page_size() returns and clz64() takes. There should be no behavioral changes on platforms other than pseries. The guest will keep using the IOMMU page size selected by the PHB pagesize property as this only changes the underlying hardware TCE table granularity. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: bcdsub fix sign when result is zeroYasmin Beatriz1-0/+3
When the result of bcdsub is equal to zero, the result sign may be set to negative in some cases, and this does not follow the Power ISA specifications as to decimal integer arithmetic instructions. Signed-off-by: Yasmin Beatriz <yasmins@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: Use non-arithmetic conversions for fp load/storeRichard Henderson3-30/+61
Memory operations have no side effects on fp state. The use of a "real" conversions between float64 and float32 would raise exceptions for SNaN and out-of-range inputs. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: Honor fpscr_ze semantics and tidy fre, fresqrtRichard Henderson1-25/+37
Divide by zero, exception taken, leaves the destination register unmodified. Therefore we must raise the exception before returning from the respective helpers. >From helper_fre, divide by zero exception not taken, return the documented +/- 0.5. At the same time, tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. At the same time, pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: Tidy helper_fsqrtRichard Henderson2-16/+15
Tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. Pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: Tidy helper_fadd, helper_fsubRichard Henderson2-31/+23
Tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. Pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Note that because we know float_flag_invalid was set, we do not have to re-check the signs of the infinities. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: Tidy helper_fmulRichard Henderson2-15/+12
Tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. Pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: Honor fpscr_ze semantics and tidy fdivRichard Henderson2-23/+29
Divide by zero, exception taken, leaves the destination register unmodified. Therefore we must raise the exception before returning from helper_fdiv. Move the check from do_float_check_status into helper_fdiv. At the same time, tidy the invalid exception checking so that we rely on softfloat for initial argument validation, and select the kind of invalid operand exception only when we know we must. At the same time, pass and return float64 values directly rather than bounce through the CPU_DoubleU union. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21target/ppc: Enable fp exceptions for user-onlyRichard Henderson2-3/+14
While just setting the MSR bits is sufficient, we can tidy the helper code by extracting the MSR test to a helper and then forcing it true for user-only. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21pseries: Update SLOF firmware imageAlexey Kardashevskiy3-1/+1
This includes gcc8.1 fixes and the image is compiled using gcc 8.1 as well. The full list of changes is: > Fix bad assembler statements for compiling with gcc 8.1 / as 2.30 > libelf: Add REL32 to the list of ignored relocations Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-21spapr_cpu_core: vmstate_[un]register per-CPU data from (un)realizefnBharata B Rao1-30/+32
VMStateDescription vmstate_spapr_cpu_state was added by commit b94020268e0b6 (spapr_cpu_core: migrate per-CPU data) to migrate per-CPU data with the required vmstate registration and unregistration calls. However the unregistration is being done only from vcpu creation error path and not from CPU delete path. This causes migration to fail with the following error if migration is attempted after a CPU unplug like this: Unknown savevm section or instance 'spapr_cpu' 16 Additionally this leaves the source VM unresponsive after migration failure. Fix this by ensuring the vmstate_unregister happens during CPU removal. Fixing this becomes easier when vmstate (un)registration calls are moved to vcpu (un)realize functions which is what this patch does. Fixes: https://bugs.launchpad.net/qemu/+bug/1785972 Reported-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-20linux-user: add QEMU_IFLA_INFO_KIND nested type for tunLaurent Vivier1-0/+48
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180820171557.7734-5-laurent@vivier.eu>
2018-08-20linux-user: update netlink route typesLaurent Vivier1-0/+19
Add RTA_PREF and RTA_CACHEINFO. Fix following errors when we start gedit: Unknown host RTA type: 12 Unknown host RTA type: 20 Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180820171557.7734-4-laurent@vivier.eu>
2018-08-20linux-user: introduce QEMU_RTA_* to use with rtattr_type_tLaurent Vivier1-11/+45
Following commit will introduce RTA_PREF that appears only with kernel v4.1. To avoid to manage a specific case for it, this patch introduces the full list of rtattr_type_t prefixed with QEMU_ (as we did for IFLA values) Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180820171557.7734-3-laurent@vivier.eu> [lv: added more RTA_* from linux v4.18]
2018-08-20linux-user: fix recvmsg()/recvfrom() with netlink and MSG_TRUNCLaurent Vivier1-2/+7
If recvmsg()/recvfrom() are used with the MSG_TRUNC flag, they return the real length even if it was longer than the passed buffer. So when we translate the buffer we must check we don't go beyond the end of the buffer. Bug: https://github.com/vivier/qemu-m68k/issues/33 Reported-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180820171557.7734-2-laurent@vivier.eu>
2018-08-20sun4m: don't use legacy fw_cfg_init_mem() functionMark Cave-Ayland1-1/+11
Instead initialise the device via qdev to allow us to set device properties directly as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2018-08-20sun4u: ensure kernel_top is always initialisedMark Cave-Ayland1-2/+2
Valgrind reports that when loading a non-ELF kernel, kernel_top may be used uninitialised when checking for an initrd. Since there are no known non-ELF kernels for SPARC64 then we can simply initialise kernel_top to 0 and then skip the initrd load process if it hasn't been set by load_elf(). Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2018-08-20Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180820' into stagingPeter Maydell36-157/+460
First round of s390x patches for 3.1: - add compat machine for 3.1 - remove deprecated 's390-squash-mcss' option - cpu models: add "max" cpu model, enhance feature group code - kvm: add support for etoken facility and huge page backing # gpg: Signature made Mon 20 Aug 2018 13:47:38 BST # gpg: using RSA key DECF6B93C6F02FAF # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" # gpg: aka "Cornelia Huck <cohuck@kernel.org>" # gpg: aka "Cornelia Huck <cohuck@redhat.com>" # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20180820: s390x: Enable KVM huge page backing support s390x/kvm: add etoken facility linux-headers: update s390x/cpumodel: Add "-cpu max" support s390x: remove 's390-squash-mcss' option s390x/cpumodel: enum type S390FeatGroup now gets generated s390x: introduce 3.1 compat machine Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-20tests/vm: Clean out old working directories on buildPeter Maydell3-0/+3
When we do a build inside one of the BSD VMs, first delete any stale old build directories from the VM's /var/tmp. This prevents the VM from running out of disk space after it has been used for a dozen or so builds. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 20180820124811.7982-1-peter.maydell@linaro.org
2018-08-20Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into ↵Peter Maydell13-139/+283
staging RDMA queue # gpg: Signature made Sat 18 Aug 2018 16:01:46 BST # gpg: using RSA key 36D4C0F0CF2FE46D # gpg: Good signature from "Marcel Apfelbaum <marcel.apfelbaum@zoho.com>" # gpg: aka "Marcel Apfelbaum <marcel@redhat.com>" # gpg: aka "Marcel Apfelbaum <marcel.apfelbaum@gmail.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: B1C6 3A57 F92E 08F2 640F 31F5 36D4 C0F0 CF2F E46D * remotes/marcel/tags/rdma-pull-request: config: split PVRDMA from RDMA hw/pvrdma: remove not needed include hw/rdma: Add reference to pci_dev in backend_dev hw/rdma: Bugfix - Support non-aligned buffers hw/rdma: Print backend QP number in hex format hw/rdma: Cosmetic change - move to generic function hw/pvrdma: Cosmetic change - indent right hw/rdma: Reorder resource cleanup hw/rdma: Do not allocate memory for non-dma MR hw/rdma: Delete useless structure RdmaRmUserMR hw/pvrdma: Make default pkey 0xFFFF hw/pvrdma: Clean CQE before use hw/rdma: Modify debug macros hw/pvrdma: Bugfix - provide the correct attr_mask to query_qp hw/rdma: Make distinction between device init and start modes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-20Merge remote-tracking branch ↵Peter Maydell31-529/+716
'remotes/pmaydell/tags/pull-target-arm-20180820' into staging target-arm queue: * Fix crash on conditional instruction in an IT block * docs/generic-loader: mention U-Boot and Intel HEX executable formats * hw/intc/arm_gicv3_its: downgrade error_report to warn_report in kvm_arm_its_reset * imx_serial: Generate interrupt on receive data ready if enabled * Fix various minor bugs in AArch32 Hyp related coprocessor registers * Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked) * Implement AArch32 ERET instruction * hw/arm/virt: Add virt-3.1 machine type * sdhci: add i.MX SD Stable Clock bit * Remove now-obsolete MMIO request_ptr APIs * hw/timer/m48t59: Move away from old_mmio accessors * hw/watchdog/cmsdk_apb_watchdog: Implement CMSDK APB watchdog module * nvic: Expose NMI line * hw/dma/pl080: cleanups and new features required for use in MPS boards # gpg: Signature made Mon 20 Aug 2018 11:30:12 BST # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180820: (25 commits) hw/dma/pl080: Remove hw_error() if DMA is enabled hw/dma/pl080: Correct bug in register address decode logic hw/dma/pl080: Provide device reset function hw/dma/pl080: Don't use CPU address space for DMA accesses hw/dma/pl080: Support all three interrupt lines hw/dma/pl080: Allow use as embedded-struct device nvic: Expose NMI line hw/watchdog/cmsdk_apb_watchdog: Implement CMSDK APB watchdog module hw/timer/m48t59: Move away from old_mmio accessors hw/misc: Remove mmio_interface device memory: Remove MMIO request_ptr APIs hw/ssi/xilinx_spips: Remove unneeded MMIO request_ptr code sdhci: add i.MX SD Stable Clock bit hw/arm/virt: Add virt-3.1 machine type target/arm: Implement AArch32 ERET instruction target/arm: Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked) target/arm: Implement ESR_EL2/HSR for AArch32 and no-EL2 target/arm: Implement AArch32 Hyp FARs target/arm: Implement AArch32 HVBAR target/arm: Add missing .cp = 15 to HMAIR1 and HAMAIR1 regdefs ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2025-02-21 22:36:45 +0000