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-rw-r--r--tcg/s390/tcg-target.inc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c
index 38b9e79..ee0dff9 100644
--- a/tcg/s390/tcg-target.inc.c
+++ b/tcg/s390/tcg-target.inc.c
@@ -24,8 +24,6 @@
* THE SOFTWARE.
*/
-#include "tcg-be-ldst.h"
-
/* We only support generating code for 64-bit mode. */
#if TCG_TARGET_REG_BITS != 64
#error "unsupported code generation mode"
@@ -1458,6 +1456,8 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
}
#if defined(CONFIG_SOFTMMU)
+#include "tcg-ldst.inc.c"
+
/* We're expecting to use a 20-bit signed offset on the tlb memory ops.
Using the offset of the second entry in the last tlb table ensures
that we can index all of the elements of the first entry. */