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-rw-r--r--target/riscv/cpu.c1
-rw-r--r--target/riscv/cpu.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index bcdce85..f6aeeca 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -529,6 +529,7 @@ static Property riscv_cpu_properties[] = {
DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64),
DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true),
+ DEFINE_PROP_UINT64("resetvec", RISCVCPU, cfg.resetvec, DEFAULT_RSTVEC),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index d3589ae..0d1728a 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -291,6 +291,7 @@ typedef struct RISCVCPU {
uint16_t elen;
bool mmu;
bool pmp;
+ uint64_t resetvec;
} cfg;
} RISCVCPU;