diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/cpu-models.c | 3 | ||||
| -rw-r--r-- | target/ppc/cpu-models.h | 258 | ||||
| -rw-r--r-- | target/ppc/cpu.h | 1 | ||||
| -rw-r--r-- | target/ppc/kvm.c | 80 | ||||
| -rw-r--r-- | target/ppc/kvm_ppc.h | 16 | ||||
| -rw-r--r-- | target/ppc/translate_init.c | 38 |
6 files changed, 72 insertions, 324 deletions
diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index 9626d6b..9d45702 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -167,6 +167,8 @@ "PowerPC 440 EPb") POWERPC_DEF("440epx", CPU_POWERPC_440EPX, 440EP, "PowerPC 440 EPX") + POWERPC_DEF("460exb", CPU_POWERPC_460EXb, 460EX, + "PowerPC 460 EXb") #if defined(TODO_USER_ONLY) POWERPC_DEF("440gpb", CPU_POWERPC_440GPb, 440GP, "PowerPC 440 GPb") @@ -786,6 +788,7 @@ PowerPCCPUAlias ppc_cpu_aliases[] = { { "x2vp50", "x2vp20" }, { "440ep", "440epb" }, + { "460ex", "460exb" }, #if defined(TODO_USER_ONLY) { "440gp", "440gpc" }, { "440gr", "440gra" }, diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h index df31d7f..25ef372 100644 --- a/target/ppc/cpu-models.h +++ b/target/ppc/cpu-models.h @@ -44,184 +44,55 @@ enum { /* PowerPC 401 cores */ CPU_POWERPC_401A1 = 0x00210000, CPU_POWERPC_401B2 = 0x00220000, -#if 0 - CPU_POWERPC_401B3 = xxx, -#endif CPU_POWERPC_401C2 = 0x00230000, CPU_POWERPC_401D2 = 0x00240000, CPU_POWERPC_401E2 = 0x00250000, CPU_POWERPC_401F2 = 0x00260000, CPU_POWERPC_401G2 = 0x00270000, /* PowerPC 401 microcontrolers */ -#if 0 - CPU_POWERPC_401GF = xxx, -#endif #define CPU_POWERPC_IOP480 CPU_POWERPC_401B2 /* IBM Processor for Network Resources */ CPU_POWERPC_COBRA = 0x10100000, /* XXX: 405 ? */ -#if 0 - CPU_POWERPC_XIPCHIP = xxx, -#endif /* PowerPC 403 family */ /* PowerPC 403 microcontrollers */ CPU_POWERPC_403GA = 0x00200011, CPU_POWERPC_403GB = 0x00200100, CPU_POWERPC_403GC = 0x00200200, CPU_POWERPC_403GCX = 0x00201400, -#if 0 - CPU_POWERPC_403GP = xxx, -#endif /* PowerPC 405 family */ /* PowerPC 405 cores */ -#if 0 - CPU_POWERPC_405A3 = xxx, -#endif -#if 0 - CPU_POWERPC_405A4 = xxx, -#endif -#if 0 - CPU_POWERPC_405B3 = xxx, -#endif -#if 0 - CPU_POWERPC_405B4 = xxx, -#endif -#if 0 - CPU_POWERPC_405C3 = xxx, -#endif -#if 0 - CPU_POWERPC_405C4 = xxx, -#endif CPU_POWERPC_405D2 = 0x20010000, -#if 0 - CPU_POWERPC_405D3 = xxx, -#endif CPU_POWERPC_405D4 = 0x41810000, -#if 0 - CPU_POWERPC_405D5 = xxx, -#endif -#if 0 - CPU_POWERPC_405E4 = xxx, -#endif -#if 0 - CPU_POWERPC_405F4 = xxx, -#endif -#if 0 - CPU_POWERPC_405F5 = xxx, -#endif -#if 0 - CPU_POWERPC_405F6 = xxx, -#endif /* PowerPC 405 microcontrolers */ /* XXX: missing 0x200108a0 */ CPU_POWERPC_405CRa = 0x40110041, CPU_POWERPC_405CRb = 0x401100C5, CPU_POWERPC_405CRc = 0x40110145, CPU_POWERPC_405EP = 0x51210950, -#if 0 - CPU_POWERPC_405EXr = xxx, -#endif CPU_POWERPC_405EZ = 0x41511460, /* 0x51210950 ? */ -#if 0 - CPU_POWERPC_405FX = xxx, -#endif CPU_POWERPC_405GPa = 0x40110000, CPU_POWERPC_405GPb = 0x40110040, CPU_POWERPC_405GPc = 0x40110082, CPU_POWERPC_405GPd = 0x401100C4, CPU_POWERPC_405GPR = 0x50910951, -#if 0 - CPU_POWERPC_405H = xxx, -#endif -#if 0 - CPU_POWERPC_405L = xxx, -#endif CPU_POWERPC_405LP = 0x41F10000, -#if 0 - CPU_POWERPC_405PM = xxx, -#endif -#if 0 - CPU_POWERPC_405PS = xxx, -#endif -#if 0 - CPU_POWERPC_405S = xxx, -#endif /* IBM network processors */ CPU_POWERPC_NPE405H = 0x414100C0, CPU_POWERPC_NPE405H2 = 0x41410140, CPU_POWERPC_NPE405L = 0x416100C0, CPU_POWERPC_NPE4GS3 = 0x40B10000, -#if 0 - CPU_POWERPC_NPCxx1 = xxx, -#endif -#if 0 - CPU_POWERPC_NPR161 = xxx, -#endif -#if 0 - CPU_POWERPC_LC77700 = xxx, -#endif /* IBM STBxxx (PowerPC 401/403/405 core based microcontrollers) */ -#if 0 - CPU_POWERPC_STB01000 = xxx, -#endif -#if 0 - CPU_POWERPC_STB01010 = xxx, -#endif -#if 0 - CPU_POWERPC_STB0210 = xxx, /* 401B3 */ -#endif CPU_POWERPC_STB03 = 0x40310000, /* 0x40130000 ? */ -#if 0 - CPU_POWERPC_STB043 = xxx, -#endif -#if 0 - CPU_POWERPC_STB045 = xxx, -#endif CPU_POWERPC_STB04 = 0x41810000, CPU_POWERPC_STB25 = 0x51510950, -#if 0 - CPU_POWERPC_STB130 = xxx, -#endif /* Xilinx cores */ CPU_POWERPC_X2VP4 = 0x20010820, CPU_POWERPC_X2VP20 = 0x20010860, -#if 0 - CPU_POWERPC_ZL10310 = xxx, -#endif -#if 0 - CPU_POWERPC_ZL10311 = xxx, -#endif -#if 0 - CPU_POWERPC_ZL10320 = xxx, -#endif -#if 0 - CPU_POWERPC_ZL10321 = xxx, -#endif /* PowerPC 440 family */ /* Generic PowerPC 440 */ #define CPU_POWERPC_440 CPU_POWERPC_440GXf /* PowerPC 440 cores */ -#if 0 - CPU_POWERPC_440A4 = xxx, -#endif CPU_POWERPC_440_XILINX = 0x7ff21910, -#if 0 - CPU_POWERPC_440A5 = xxx, -#endif -#if 0 - CPU_POWERPC_440B4 = xxx, -#endif -#if 0 - CPU_POWERPC_440F5 = xxx, -#endif -#if 0 - CPU_POWERPC_440G5 = xxx, -#endif -#if 0 - CPU_POWERPC_440H4 = xxx, -#endif -#if 0 - CPU_POWERPC_440H6 = xxx, -#endif /* PowerPC 440 microcontrolers */ CPU_POWERPC_440EPa = 0x42221850, CPU_POWERPC_440EPb = 0x422218D3, @@ -234,24 +105,10 @@ enum { CPU_POWERPC_440GXb = 0x51B21851, CPU_POWERPC_440GXc = 0x51B21892, CPU_POWERPC_440GXf = 0x51B21894, -#if 0 - CPU_POWERPC_440S = xxx, -#endif CPU_POWERPC_440SP = 0x53221850, CPU_POWERPC_440SP2 = 0x53221891, CPU_POWERPC_440SPE = 0x53421890, - /* PowerPC 460 family */ -#if 0 - /* Generic PowerPC 464 */ -#define CPU_POWERPC_464 CPU_POWERPC_464H90 -#endif - /* PowerPC 464 microcontrolers */ -#if 0 - CPU_POWERPC_464H90 = xxx, -#endif -#if 0 - CPU_POWERPC_464H90FP = xxx, -#endif + CPU_POWERPC_460EXb = 0x130218A4, /* called 460 but 440 core */ /* Freescale embedded PowerPC cores */ /* PowerPC MPC 5xx cores (aka RCPU) */ CPU_POWERPC_MPC5xx = 0x00020020, @@ -280,45 +137,8 @@ enum { #define CPU_POWERPC_MPC5200B_v21 CPU_POWERPC_G2LEgp1 /* e200 family */ /* e200 cores */ -#if 0 - CPU_POWERPC_e200z0 = xxx, -#endif -#if 0 - CPU_POWERPC_e200z1 = xxx, -#endif -#if 0 /* ? */ - CPU_POWERPC_e200z3 = 0x81120000, -#endif CPU_POWERPC_e200z5 = 0x81000000, CPU_POWERPC_e200z6 = 0x81120000, - /* MPC55xx microcontrollers */ -#define CPU_POWERPC_MPC55xx CPU_POWERPC_MPC5567 -#if 0 -#define CPU_POWERPC_MPC5514E CPU_POWERPC_MPC5514E_v1 -#define CPU_POWERPC_MPC5514E_v0 CPU_POWERPC_e200z0 -#define CPU_POWERPC_MPC5514E_v1 CPU_POWERPC_e200z1 -#define CPU_POWERPC_MPC5514G CPU_POWERPC_MPC5514G_v1 -#define CPU_POWERPC_MPC5514G_v0 CPU_POWERPC_e200z0 -#define CPU_POWERPC_MPC5514G_v1 CPU_POWERPC_e200z1 -#define CPU_POWERPC_MPC5515S CPU_POWERPC_e200z1 -#define CPU_POWERPC_MPC5516E CPU_POWERPC_MPC5516E_v1 -#define CPU_POWERPC_MPC5516E_v0 CPU_POWERPC_e200z0 -#define CPU_POWERPC_MPC5516E_v1 CPU_POWERPC_e200z1 -#define CPU_POWERPC_MPC5516G CPU_POWERPC_MPC5516G_v1 -#define CPU_POWERPC_MPC5516G_v0 CPU_POWERPC_e200z0 -#define CPU_POWERPC_MPC5516G_v1 CPU_POWERPC_e200z1 -#define CPU_POWERPC_MPC5516S CPU_POWERPC_e200z1 -#endif -#if 0 -#define CPU_POWERPC_MPC5533 CPU_POWERPC_e200z3 -#define CPU_POWERPC_MPC5534 CPU_POWERPC_e200z3 -#endif -#define CPU_POWERPC_MPC5553 CPU_POWERPC_e200z6 -#define CPU_POWERPC_MPC5554 CPU_POWERPC_e200z6 -#define CPU_POWERPC_MPC5561 CPU_POWERPC_e200z6 -#define CPU_POWERPC_MPC5565 CPU_POWERPC_e200z6 -#define CPU_POWERPC_MPC5566 CPU_POWERPC_e200z6 -#define CPU_POWERPC_MPC5567 CPU_POWERPC_e200z6 /* e300 family */ /* e300 cores */ CPU_POWERPC_e300c1 = 0x00830010, @@ -326,11 +146,7 @@ enum { CPU_POWERPC_e300c3 = 0x00850010, CPU_POWERPC_e300c4 = 0x00860010, /* MPC83xx microcontrollers */ -#define CPU_POWERPC_MPC831x CPU_POWERPC_e300c3 -#define CPU_POWERPC_MPC832x CPU_POWERPC_e300c2 #define CPU_POWERPC_MPC834x CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC835x CPU_POWERPC_e300c1 -#define CPU_POWERPC_MPC836x CPU_POWERPC_e300c1 #define CPU_POWERPC_MPC837x CPU_POWERPC_e300c4 /* e500 family */ /* e500 cores */ @@ -438,9 +254,6 @@ enum { /* XXX: missing 0x000a0100 */ /* XXX: missing 0x00093102 */ CPU_POWERPC_604R = 0x000a0101, -#if 0 - CPU_POWERPC_604EV = xxx, /* XXX: same as 604R ? */ -#endif /* PowerPC 740/750 cores (aka G3) */ /* XXX: missing 0x00084202 */ CPU_POWERPC_7x0_v10 = 0x00080100, @@ -495,9 +308,6 @@ enum { CPU_POWERPC_7x5_v26 = 0x00083206, CPU_POWERPC_7x5_v27 = 0x00083207, CPU_POWERPC_7x5_v28 = 0x00083208, -#if 0 - CPU_POWERPC_7x5P = xxx, -#endif /* PowerPC 74xx cores (aka G4) */ /* XXX: missing 0x000C1101 */ CPU_POWERPC_7400_v10 = 0x000C0100, @@ -585,12 +395,6 @@ enum { /* XXX: should be POWER (RIOS), RSC3308, RSC4608, * POWER2 (RIOS2) & RSC2 (P2SC) here */ -#if 0 - CPU_POWER = xxx, /* 0x20000 ? 0x30000 for RSC ? */ -#endif -#if 0 - CPU_POWER2 = xxx, /* 0x40000 ? */ -#endif /* PA Semi core */ CPU_POWERPC_PA6T = 0x00900000, }; @@ -614,60 +418,6 @@ enum { POWERPC_SVR_5200B_v20 = 0x80110020, POWERPC_SVR_5200B_v21 = 0x80110021, #define POWERPC_SVR_55xx POWERPC_SVR_5567 -#if 0 - POWERPC_SVR_5533 = xxx, -#endif -#if 0 - POWERPC_SVR_5534 = xxx, -#endif -#if 0 - POWERPC_SVR_5553 = xxx, -#endif -#if 0 - POWERPC_SVR_5554 = xxx, -#endif -#if 0 - POWERPC_SVR_5561 = xxx, -#endif -#if 0 - POWERPC_SVR_5565 = xxx, -#endif -#if 0 - POWERPC_SVR_5566 = xxx, -#endif -#if 0 - POWERPC_SVR_5567 = xxx, -#endif -#if 0 - POWERPC_SVR_8313 = xxx, -#endif -#if 0 - POWERPC_SVR_8313E = xxx, -#endif -#if 0 - POWERPC_SVR_8314 = xxx, -#endif -#if 0 - POWERPC_SVR_8314E = xxx, -#endif -#if 0 - POWERPC_SVR_8315 = xxx, -#endif -#if 0 - POWERPC_SVR_8315E = xxx, -#endif -#if 0 - POWERPC_SVR_8321 = xxx, -#endif -#if 0 - POWERPC_SVR_8321E = xxx, -#endif -#if 0 - POWERPC_SVR_8323 = xxx, -#endif -#if 0 - POWERPC_SVR_8323E = xxx, -#endif POWERPC_SVR_8343 = 0x80570010, POWERPC_SVR_8343A = 0x80570030, POWERPC_SVR_8343E = 0x80560010, @@ -684,12 +434,6 @@ enum { POWERPC_SVR_8349A = 0x80510030, POWERPC_SVR_8349E = 0x80500010, POWERPC_SVR_8349EA = 0x80500030, -#if 0 - POWERPC_SVR_8358E = xxx, -#endif -#if 0 - POWERPC_SVR_8360E = xxx, -#endif #define POWERPC_SVR_E500 0x40000000 POWERPC_SVR_8377 = 0x80C70010 | POWERPC_SVR_E500, POWERPC_SVR_8377E = 0x80C60010 | POWERPC_SVR_E500, diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index c9d3ffa..64aef17 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1243,6 +1243,7 @@ struct PPCVirtualHypervisorClass { void (*store_hpte)(PPCVirtualHypervisor *vhyp, hwaddr ptex, uint64_t pte0, uint64_t pte1); uint64_t (*get_patbe)(PPCVirtualHypervisor *vhyp); + target_ulong (*encode_hpt_for_kvm_pr)(PPCVirtualHypervisor *vhyp); }; #define TYPE_PPC_VIRTUAL_HYPERVISOR "ppc-virtual-hypervisor" diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 1deaf10..171d3d8 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -131,7 +131,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) cap_interrupt_level = kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL); cap_segstate = kvm_check_extension(s, KVM_CAP_PPC_SEGSTATE); cap_booke_sregs = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_SREGS); - cap_ppc_smt_possible = kvm_check_extension(s, KVM_CAP_PPC_SMT_POSSIBLE); + cap_ppc_smt_possible = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT_POSSIBLE); cap_ppc_rma = kvm_check_extension(s, KVM_CAP_PPC_RMA); cap_spapr_tce = kvm_check_extension(s, KVM_CAP_SPAPR_TCE); cap_spapr_tce_64 = kvm_check_extension(s, KVM_CAP_SPAPR_TCE_64); @@ -143,7 +143,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) cap_ppc_watchdog = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_WATCHDOG); /* Note: we don't set cap_papr here, because this capability is * only activated after this by kvmppc_set_papr() */ - cap_htab_fd = kvm_check_extension(s, KVM_CAP_PPC_HTAB_FD); + cap_htab_fd = kvm_vm_check_extension(s, KVM_CAP_PPC_HTAB_FD); cap_fixup_hcalls = kvm_check_extension(s, KVM_CAP_PPC_FIXUP_HCALL); cap_ppc_smt = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT); cap_htm = kvm_vm_check_extension(s, KVM_CAP_PPC_HTM); @@ -941,7 +941,13 @@ int kvmppc_put_books_sregs(PowerPCCPU *cpu) sregs.pvr = env->spr[SPR_PVR]; - sregs.u.s.sdr1 = env->spr[SPR_SDR1]; + if (cpu->vhyp) { + PPCVirtualHypervisorClass *vhc = + PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); + sregs.u.s.sdr1 = vhc->encode_hpt_for_kvm_pr(cpu->vhyp); + } else { + sregs.u.s.sdr1 = env->spr[SPR_SDR1]; + } /* Sync SLB */ #ifdef TARGET_PPC64 @@ -2353,7 +2359,7 @@ int kvmppc_reset_htab(int shift_hint) /* Full emulation, tell caller to allocate htab itself */ return 0; } - if (kvm_check_extension(kvm_state, KVM_CAP_PPC_ALLOC_HTAB)) { + if (kvm_vm_check_extension(kvm_state, KVM_CAP_PPC_ALLOC_HTAB)) { int ret; ret = kvm_vm_ioctl(kvm_state, KVM_PPC_ALLOCATE_HTAB, &shift); if (ret == -ENOTTY) { @@ -2448,11 +2454,6 @@ bool kvmppc_has_cap_epr(void) return cap_epr; } -bool kvmppc_has_cap_htab_fd(void) -{ - return cap_htab_fd; -} - bool kvmppc_has_cap_fixup_hcalls(void) { return cap_fixup_hcalls; @@ -2555,19 +2556,29 @@ int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function) return kvm_vm_ioctl(kvm_state, KVM_PPC_RTAS_DEFINE_TOKEN, &args); } -int kvmppc_get_htab_fd(bool write) +int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp) { struct kvm_get_htab_fd s = { .flags = write ? KVM_GET_HTAB_WRITE : 0, - .start_index = 0, + .start_index = index, }; + int ret; if (!cap_htab_fd) { - fprintf(stderr, "KVM version doesn't support saving the hash table\n"); - return -1; + error_setg(errp, "KVM version doesn't support %s the HPT", + write ? "writing" : "reading"); + return -ENOTSUP; } - return kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &s); + ret = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &s); + if (ret < 0) { + error_setg(errp, "Unable to open fd for %s HPT %s KVM: %s", + write ? "writing" : "reading", write ? "to" : "from", + strerror(errno)); + return -errno; + } + + return ret; } int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns) @@ -2647,17 +2658,10 @@ void kvm_arch_init_irq_routing(KVMState *s) void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, hwaddr ptex, int n) { - struct kvm_get_htab_fd ghf = { - .flags = 0, - .start_index = ptex, - }; int fd, rc; int i; - fd = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &ghf); - if (fd < 0) { - hw_error("kvmppc_read_hptes: Unable to open HPT fd"); - } + fd = kvmppc_get_htab_fd(false, ptex, &error_abort); i = 0; while (i < n) { @@ -2699,19 +2703,13 @@ void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, hwaddr ptex, int n) void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1) { int fd, rc; - struct kvm_get_htab_fd ghf; struct { struct kvm_get_htab_header hdr; uint64_t pte0; uint64_t pte1; } buf; - ghf.flags = 0; - ghf.start_index = 0; /* Ignored */ - fd = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &ghf); - if (fd < 0) { - hw_error("kvmppc_write_hpte: Unable to open HPT fd"); - } + fd = kvmppc_get_htab_fd(true, 0 /* Ignored */, &error_abort); buf.hdr.n_valid = 1; buf.hdr.n_invalid = 0; @@ -2806,30 +2804,6 @@ int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, target_ulong flags, int shift) return kvm_vm_ioctl(cs->kvm_state, KVM_PPC_RESIZE_HPT_COMMIT, &rhpt); } -static void kvmppc_pivot_hpt_cpu(CPUState *cs, run_on_cpu_data arg) -{ - target_ulong sdr1 = arg.target_ptr; - PowerPCCPU *cpu = POWERPC_CPU(cs); - CPUPPCState *env = &cpu->env; - - /* This is just for the benefit of PR KVM */ - cpu_synchronize_state(cs); - env->spr[SPR_SDR1] = sdr1; - if (kvmppc_put_books_sregs(cpu) < 0) { - error_report("Unable to update SDR1 in KVM"); - exit(1); - } -} - -void kvmppc_update_sdr1(target_ulong sdr1) -{ - CPUState *cs; - - CPU_FOREACH(cs) { - run_on_cpu(cs, kvmppc_pivot_hpt_cpu, RUN_ON_CPU_TARGET_PTR(sdr1)); - } -} - /* * This is a helper function to detect a post migration scenario * in which a guest, running as KVM-HV, freezes in cpu_post_load because diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index f780e6e..d6be38e 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -51,8 +51,7 @@ uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift); #endif /* !CONFIG_USER_ONLY */ bool kvmppc_has_cap_epr(void); int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function); -bool kvmppc_has_cap_htab_fd(void); -int kvmppc_get_htab_fd(bool write); +int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp); int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns); int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, uint16_t n_valid, uint16_t n_invalid); @@ -68,7 +67,6 @@ PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); void kvmppc_check_papr_resize_hpt(Error **errp); int kvmppc_resize_hpt_prepare(PowerPCCPU *cpu, target_ulong flags, int shift); int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, target_ulong flags, int shift); -void kvmppc_update_sdr1(target_ulong sdr1); bool kvmppc_pvr_workaround_required(PowerPCCPU *cpu); bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path); @@ -246,12 +244,7 @@ static inline int kvmppc_define_rtas_kernel_token(uint32_t token, return -1; } -static inline bool kvmppc_has_cap_htab_fd(void) -{ - return false; -} - -static inline int kvmppc_get_htab_fd(bool write) +static inline int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp) { return -1; } @@ -331,11 +324,6 @@ static inline int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, return -ENOSYS; } -static inline void kvmppc_update_sdr1(target_ulong sdr1) -{ - abort(); -} - #endif #ifndef CONFIG_KVM diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 466bf97..c6399a3 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -3833,6 +3833,44 @@ POWERPC_FAMILY(440EP)(ObjectClass *oc, void *data) POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; } +POWERPC_FAMILY(460EX)(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); + + dc->desc = "PowerPC 460 EX"; + pcc->init_proc = init_proc_440EP; + pcc->check_pow = check_pow_nocheck; + pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | + PPC_FLOAT | PPC_FLOAT_FRES | PPC_FLOAT_FSEL | + PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | + PPC_FLOAT_STFIWX | + PPC_DCR | PPC_DCRX | PPC_WRTEE | PPC_RFMCI | + PPC_CACHE | PPC_CACHE_ICBI | + PPC_CACHE_DCBZ | PPC_CACHE_DCBA | + PPC_MEM_TLBSYNC | PPC_MFTB | + PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | + PPC_440_SPEC; + pcc->msr_mask = (1ull << MSR_POW) | + (1ull << MSR_CE) | + (1ull << MSR_EE) | + (1ull << MSR_PR) | + (1ull << MSR_FP) | + (1ull << MSR_ME) | + (1ull << MSR_FE0) | + (1ull << MSR_DWE) | + (1ull << MSR_DE) | + (1ull << MSR_FE1) | + (1ull << MSR_IR) | + (1ull << MSR_DR); + pcc->mmu_model = POWERPC_MMU_BOOKE; + pcc->excp_model = POWERPC_EXCP_BOOKE; + pcc->bus_model = PPC_FLAGS_INPUT_BookE; + pcc->bfd_mach = bfd_mach_ppc_403; + pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE | + POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; +} + static void init_proc_440GP(CPUPPCState *env) { /* Time base */ |