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-rw-r--r--target/arm/kvm.c2
-rw-r--r--target/arm/kvm_arm.h2
-rwxr-xr-xtarget/hexagon/gen_tcg_funcs.py14
-rw-r--r--target/i386/cpu.c2
-rw-r--r--target/i386/kvm/kvm.c2
-rw-r--r--target/i386/machine.c2
-rw-r--r--target/i386/sev.c2
-rw-r--r--target/i386/whpx/whpx-all.c2
-rw-r--r--target/m68k/op_helper.c2
-rw-r--r--target/mips/kvm.c4
-rw-r--r--target/ppc/cpu-qom.h2
-rw-r--r--target/ppc/int_helper.c13
-rw-r--r--target/ppc/translate_init.c.inc36
-rw-r--r--target/riscv/cpu.c2
14 files changed, 65 insertions, 22 deletions
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 00e124c..bebea90 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -844,7 +844,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
return MEMTXATTRS_UNSPECIFIED;
}
-void kvm_arm_vm_state_change(void *opaque, int running, RunState state)
+void kvm_arm_vm_state_change(void *opaque, bool running, RunState state)
{
CPUState *cs = opaque;
ARMCPU *cpu = ARM_CPU(cs);
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index eb81b70..68ec970 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -352,7 +352,7 @@ void kvm_arm_get_virtual_time(CPUState *cs);
*/
void kvm_arm_put_virtual_time(CPUState *cs);
-void kvm_arm_vm_state_change(void *opaque, int running, RunState state);
+void kvm_arm_vm_state_change(void *opaque, bool running, RunState state);
int kvm_arm_vgic_probe(void);
diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs.py
index fe4d8e5..db9f663 100755
--- a/target/hexagon/gen_tcg_funcs.py
+++ b/target/hexagon/gen_tcg_funcs.py
@@ -35,7 +35,7 @@ def gen_decl_ea_tcg(f, tag):
def gen_free_ea_tcg(f):
f.write(" tcg_temp_free(EA);\n")
-def genptr_decl_pair_writeble(f, tag, regtype, regid, regno):
+def genptr_decl_pair_writable(f, tag, regtype, regid, regno):
regN="%s%sN" % (regtype,regid)
f.write(" TCGv_i64 %s%sV = tcg_temp_local_new_i64();\n" % \
(regtype, regid))
@@ -54,7 +54,7 @@ def genptr_decl_pair_writeble(f, tag, regtype, regid, regno):
(regN, regN))
f.write(" }\n")
-def genptr_decl_writeble(f, tag, regtype, regid, regno):
+def genptr_decl_writable(f, tag, regtype, regid, regno):
regN="%s%sN" % (regtype,regid)
f.write(" TCGv %s%sV = tcg_temp_local_new();\n" % \
(regtype, regid))
@@ -78,12 +78,12 @@ def genptr_decl(f, tag, regtype, regid, regno):
f.write(" const int %s = insn->regno[%d];\n" % \
(regN, regno))
elif (regid in {"dd", "ee", "xx", "yy"}):
- genptr_decl_pair_writeble(f, tag, regtype, regid, regno)
+ genptr_decl_pair_writable(f, tag, regtype, regid, regno)
elif (regid in {"s", "t", "u", "v"}):
f.write(" TCGv %s%sV = hex_gpr[insn->regno[%d]];\n" % \
(regtype, regid, regno))
elif (regid in {"d", "e", "x", "y"}):
- genptr_decl_writeble(f, tag, regtype, regid, regno)
+ genptr_decl_writable(f, tag, regtype, regid, regno)
else:
print("Bad register parse: ", regtype, regid)
elif (regtype == "P"):
@@ -91,7 +91,7 @@ def genptr_decl(f, tag, regtype, regid, regno):
f.write(" TCGv %s%sV = hex_pred[insn->regno[%d]];\n" % \
(regtype, regid, regno))
elif (regid in {"d", "e", "x"}):
- genptr_decl_writeble(f, tag, regtype, regid, regno)
+ genptr_decl_writable(f, tag, regtype, regid, regno)
else:
print("Bad register parse: ", regtype, regid)
elif (regtype == "C"):
@@ -101,14 +101,14 @@ def genptr_decl(f, tag, regtype, regid, regno):
f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
(regN, regno))
elif (regid == "dd"):
- genptr_decl_pair_writeble(f, tag, regtype, regid, regno)
+ genptr_decl_pair_writable(f, tag, regtype, regid, regno)
elif (regid == "s"):
f.write(" TCGv %s%sV = tcg_temp_local_new();\n" % \
(regtype, regid))
f.write(" const int %s%sN = insn->regno[%d] + HEX_REG_SA0;\n" % \
(regtype, regid, regno))
elif (regid == "d"):
- genptr_decl_writeble(f, tag, regtype, regid, regno)
+ genptr_decl_writable(f, tag, regtype, regid, regno)
else:
print("Bad register parse: ", regtype, regid)
elif (regtype == "M"):
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 5000843..ae9fd9f 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7081,7 +7081,7 @@ static void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v,
GuestPanicInformation *panic_info;
if (!cs->crash_occurred) {
- error_setg(errp, "No crash occured");
+ error_setg(errp, "No crash occurred");
return;
}
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index c8d61da..7fe9f52 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -693,7 +693,7 @@ static int kvm_inject_mce_oldstyle(X86CPU *cpu)
return 0;
}
-static void cpu_update_state(void *opaque, int running, RunState state)
+static void cpu_update_state(void *opaque, bool running, RunState state)
{
CPUX86State *env = opaque;
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 3768a75..3967dfc 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -1173,7 +1173,7 @@ static int nested_state_post_load(void *opaque, int version_id)
return -EINVAL;
}
if (nested_state->size > max_nested_state_len) {
- error_report("Recieved unsupported nested state size: "
+ error_report("Received unsupported nested state size: "
"nested_state->size=%d, max=%d",
nested_state->size, max_nested_state_len);
return -EINVAL;
diff --git a/target/i386/sev.c b/target/i386/sev.c
index 0f414df..72b9e2a 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -691,7 +691,7 @@ sev_launch_finish(SevGuestState *sev)
}
static void
-sev_vm_state_change(void *opaque, int running, RunState state)
+sev_vm_state_change(void *opaque, bool running, RunState state)
{
SevGuestState *sev = opaque;
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index f0a35df..f832f28 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -1318,7 +1318,7 @@ void whpx_cpu_synchronize_pre_loadvm(CPUState *cpu)
static Error *whpx_migration_blocker;
-static void whpx_cpu_update_state(void *opaque, int running, RunState state)
+static void whpx_cpu_update_state(void *opaque, bool running, RunState state)
{
CPUX86State *env = opaque;
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index 46ff81a..ae1ba4b 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -117,7 +117,7 @@ static const char *m68k_exception_name(int index)
case EXCP_FORMAT:
return "Format Error";
case EXCP_UNINITIALIZED:
- return "Unitialized Interruot";
+ return "Uninitialized Interrupt";
case EXCP_SPURIOUS:
return "Spurious Interrupt";
case EXCP_INT_LEVEL_1:
diff --git a/target/mips/kvm.c b/target/mips/kvm.c
index 123ec1b..086debd 100644
--- a/target/mips/kvm.c
+++ b/target/mips/kvm.c
@@ -38,7 +38,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
KVM_CAP_LAST_INFO
};
-static void kvm_mips_update_state(void *opaque, int running, RunState state);
+static void kvm_mips_update_state(void *opaque, bool running, RunState state);
unsigned long kvm_arch_vcpu_id(CPUState *cs)
{
@@ -553,7 +553,7 @@ static int kvm_mips_restore_count(CPUState *cs)
/*
* Handle the VM clock being started or stopped
*/
-static void kvm_mips_update_state(void *opaque, int running, RunState state)
+static void kvm_mips_update_state(void *opaque, bool running, RunState state)
{
CPUState *cs = opaque;
int ret;
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
index 63b9e86..118baf8 100644
--- a/target/ppc/cpu-qom.h
+++ b/target/ppc/cpu-qom.h
@@ -218,7 +218,7 @@ extern const VMStateDescription vmstate_ppc_timebase;
.offset = vmstate_offset_value(_state, _field, PPCTimebase), \
}
-void cpu_ppc_clock_vm_state_change(void *opaque, int running,
+void cpu_ppc_clock_vm_state_change(void *opaque, bool running,
RunState state);
#endif
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 0b682a1..429de28 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2175,14 +2175,17 @@ static int bcd_cmp_mag(ppc_avr_t *a, ppc_avr_t *b)
return 0;
}
-static void bcd_add_mag(ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, int *invalid,
+static int bcd_add_mag(ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, int *invalid,
int *overflow)
{
int carry = 0;
int i;
+ int is_zero = 1;
+
for (i = 1; i <= 31; i++) {
uint8_t digit = bcd_get_digit(a, i, invalid) +
bcd_get_digit(b, i, invalid) + carry;
+ is_zero &= (digit == 0);
if (digit > 9) {
carry = 1;
digit -= 10;
@@ -2194,6 +2197,7 @@ static void bcd_add_mag(ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, int *invalid,
}
*overflow = carry;
+ return is_zero;
}
static void bcd_sub_mag(ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, int *invalid,
@@ -2225,14 +2229,15 @@ uint32_t helper_bcdadd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
int sgnb = bcd_get_sgn(b);
int invalid = (sgna == 0) || (sgnb == 0);
int overflow = 0;
+ int zero = 0;
uint32_t cr = 0;
ppc_avr_t result = { .u64 = { 0, 0 } };
if (!invalid) {
if (sgna == sgnb) {
result.VsrB(BCD_DIG_BYTE(0)) = bcd_preferred_sgn(sgna, ps);
- bcd_add_mag(&result, a, b, &invalid, &overflow);
- cr = bcd_cmp_zero(&result);
+ zero = bcd_add_mag(&result, a, b, &invalid, &overflow);
+ cr = (sgna > 0) ? CRF_GT : CRF_LT;
} else {
int magnitude = bcd_cmp_mag(a, b);
if (magnitude > 0) {
@@ -2255,6 +2260,8 @@ uint32_t helper_bcdadd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
cr = CRF_SO;
} else if (overflow) {
cr |= CRF_SO;
+ } else if (zero) {
+ cr |= CRF_EQ;
}
*r = result;
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index 108ff2b..c03a7c4 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -566,35 +566,71 @@ static void spr_write_601_ubatl(DisasContext *ctx, int sprn, int gprn)
#if !defined(CONFIG_USER_ONLY)
static void spr_read_40x_pit(DisasContext *ctx, int gprn, int sprn)
{
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
gen_helper_load_40x_pit(cpu_gpr[gprn], cpu_env);
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_stop_exception(ctx);
+ }
}
static void spr_write_40x_pit(DisasContext *ctx, int sprn, int gprn)
{
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
gen_helper_store_40x_pit(cpu_env, cpu_gpr[gprn]);
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_stop_exception(ctx);
+ }
}
static void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int gprn)
{
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
gen_store_spr(sprn, cpu_gpr[gprn]);
gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]);
/* We must stop translation as we may have rebooted */
gen_stop_exception(ctx);
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_stop_exception(ctx);
+ }
}
static void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn)
{
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
gen_helper_store_40x_sler(cpu_env, cpu_gpr[gprn]);
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_stop_exception(ctx);
+ }
}
static void spr_write_booke_tcr(DisasContext *ctx, int sprn, int gprn)
{
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
gen_helper_store_booke_tcr(cpu_env, cpu_gpr[gprn]);
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_stop_exception(ctx);
+ }
}
static void spr_write_booke_tsr(DisasContext *ctx, int sprn, int gprn)
{
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
gen_helper_store_booke_tsr(cpu_env, cpu_gpr[gprn]);
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+ gen_stop_exception(ctx);
+ }
}
#endif
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index ddea8fb..2a990f6 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -506,7 +506,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
return;
}
} else {
- qemu_log("vector verison is not specified, "
+ qemu_log("vector version is not specified, "
"use the default value v0.7.1\n");
}
set_vext_version(env, vext_version);
generated by cgit v1.1 at 2024-12-27 17:54:38 +0000