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-rw-r--r--target/xtensa/translate.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index afae8a1..bdd4690 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -2362,13 +2362,14 @@ static uint32_t test_exceptions_simcall(DisasContext *dc,
const OpcodeArg arg[],
const uint32_t par[])
{
+ bool is_semi = semihosting_enabled(dc->cring != 0);
#ifdef CONFIG_USER_ONLY
bool ill = true;
#else
/* Between RE.2 and RE.3 simcall opcode's become nop for the hardware. */
- bool ill = dc->config->hw_version <= 250002 && !semihosting_enabled(false);
+ bool ill = dc->config->hw_version <= 250002 && !is_semi;
#endif
- if (ill || !semihosting_enabled(false)) {
+ if (ill || !is_semi) {
qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n");
}
return ill ? XTENSA_OP_ILL : 0;
@@ -2378,7 +2379,7 @@ static void translate_simcall(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
#ifndef CONFIG_USER_ONLY
- if (semihosting_enabled(false)) {
+ if (semihosting_enabled(dc->cring != 0)) {
gen_helper_simcall(cpu_env);
}
#endif