aboutsummaryrefslogtreecommitdiff
path: root/target
diff options
context:
space:
mode:
Diffstat (limited to 'target')
-rw-r--r--target/mips/tcg/tx79.decode1
-rw-r--r--target/mips/tcg/tx79_translate.c30
2 files changed, 31 insertions, 0 deletions
diff --git a/target/mips/tcg/tx79.decode b/target/mips/tcg/tx79.decode
index 63fbe96..6539103 100644
--- a/target/mips/tcg/tx79.decode
+++ b/target/mips/tcg/tx79.decode
@@ -38,6 +38,7 @@ PCGTH 011100 ..... ..... ..... 00110 001000 @rs_rt_rd
PSUBB 011100 ..... ..... ..... 01001 001000 @rs_rt_rd
PCGTB 011100 ..... ..... ..... 01010 001000 @rs_rt_rd
PEXTLW 011100 ..... ..... ..... 10010 001000 @rs_rt_rd
+PPACW 011100 ..... ..... ..... 10011 001000 @rs_rt_rd
PEXTLH 011100 ..... ..... ..... 10110 001000 @rs_rt_rd
PEXTLB 011100 ..... ..... ..... 11010 001000 @rs_rt_rd
diff --git a/target/mips/tcg/tx79_translate.c b/target/mips/tcg/tx79_translate.c
index f0e3d8c..90c33d2 100644
--- a/target/mips/tcg/tx79_translate.c
+++ b/target/mips/tcg/tx79_translate.c
@@ -374,6 +374,36 @@ static bool trans_PCEQW(DisasContext *ctx, arg_rtype *a)
* PEXTLW rd, rs, rt Parallel Extend Lower from Word
*/
+/* Parallel Pack to Word */
+static bool trans_PPACW(DisasContext *ctx, arg_rtype *a)
+{
+ TCGv_i64 a0, b0, t0;
+
+ if (a->rd == 0) {
+ /* nop */
+ return true;
+ }
+
+ a0 = tcg_temp_new_i64();
+ b0 = tcg_temp_new_i64();
+ t0 = tcg_temp_new_i64();
+
+ gen_load_gpr(a0, a->rs);
+ gen_load_gpr(b0, a->rt);
+
+ gen_load_gpr_hi(t0, a->rt); /* b1 */
+ tcg_gen_deposit_i64(cpu_gpr[a->rd], b0, t0, 32, 32);
+
+ gen_load_gpr_hi(t0, a->rs); /* a1 */
+ tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], a0, t0, 32, 32);
+
+ tcg_temp_free(t0);
+ tcg_temp_free(b0);
+ tcg_temp_free(a0);
+
+ return true;
+}
+
static void gen_pextw(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 a, TCGv_i64 b)
{
tcg_gen_deposit_i64(dl, b, a, 32, 32);