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-rw-r--r--target/alpha/translate.c1
-rw-r--r--target/i386/kvm.c12
-rw-r--r--target/nios2/op_helper.c3
3 files changed, 16 insertions, 0 deletions
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 055286a..df5d695 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "sysemu/cpus.h"
#include "disas/disas.h"
#include "qemu/host-utils.h"
#include "exec/exec-all.h"
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 472399f..55865db 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -1824,6 +1824,12 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
return ret;
}
+ if (ret < cpu->kvm_msr_buf->nmsrs) {
+ struct kvm_msr_entry *e = &cpu->kvm_msr_buf->entries[ret];
+ error_report("error: failed to set MSR 0x%" PRIx32 " to 0x%" PRIx64,
+ (uint32_t)e->index, (uint64_t)e->data);
+ }
+
assert(ret == cpu->kvm_msr_buf->nmsrs);
return 0;
}
@@ -2189,6 +2195,12 @@ static int kvm_get_msrs(X86CPU *cpu)
return ret;
}
+ if (ret < cpu->kvm_msr_buf->nmsrs) {
+ struct kvm_msr_entry *e = &cpu->kvm_msr_buf->entries[ret];
+ error_report("error: failed to get MSR 0x%" PRIx32,
+ (uint32_t)e->index);
+ }
+
assert(ret == cpu->kvm_msr_buf->nmsrs);
/*
* MTRR masks: Each mask consists of 5 parts
diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c
index 538853c..efb1c48 100644
--- a/target/nios2/op_helper.c
+++ b/target/nios2/op_helper.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
+#include "qemu/main-loop.h"
#if !defined(CONFIG_USER_ONLY)
void helper_mmu_read_debug(CPUNios2State *env, uint32_t rn)
@@ -35,7 +36,9 @@ void helper_mmu_write(CPUNios2State *env, uint32_t rn, uint32_t v)
void helper_check_interrupts(CPUNios2State *env)
{
+ qemu_mutex_lock_iothread();
nios2_check_interrupts(env);
+ qemu_mutex_unlock_iothread();
}
#endif /* !CONFIG_USER_ONLY */