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Diffstat (limited to 'target/riscv/translate.c')
-rw-r--r--target/riscv/translate.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index a1f794f..e945352 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -435,6 +435,12 @@ EX_SH(12)
} \
} while (0)
+#define REQUIRE_64BIT(ctx) do { \
+ if (is_32bit(ctx)) { \
+ return false; \
+ } \
+} while (0)
+
static int ex_rvc_register(DisasContext *ctx, int reg)
{
return 8 + reg;
@@ -482,7 +488,6 @@ static bool gen_arith_imm_tl(DisasContext *ctx, arg_i *a,
return true;
}
-#ifdef TARGET_RISCV64
static void gen_addw(TCGv ret, TCGv arg1, TCGv arg2)
{
tcg_gen_add_tl(ret, arg1, arg2);
@@ -543,8 +548,6 @@ static bool gen_arith_div_uw(DisasContext *ctx, arg_r *a,
return true;
}
-#endif
-
static bool gen_arith(DisasContext *ctx, arg_r *a,
void(*func)(TCGv, TCGv, TCGv))
{