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-rw-r--r--target/riscv/cpu_bits.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 5a6d49a..7c87433 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -449,6 +449,9 @@ typedef enum {
#define COUNTEREN_IR (1 << 2)
#define COUNTEREN_HPM3 (1 << 3)
+/* vsstatus CSR bits */
+#define VSSTATUS64_UXL 0x0000000300000000ULL
+
/* Privilege modes */
#define PRV_U 0
#define PRV_S 1