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Diffstat (limited to 'target/mips/tlb_helper.c')
-rw-r--r--target/mips/tlb_helper.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c
index 78720c4..afc019c 100644
--- a/target/mips/tlb_helper.c
+++ b/target/mips/tlb_helper.c
@@ -403,8 +403,6 @@ void cpu_mips_tlb_flush(CPUMIPSState *env)
env->tlb->tlb_in_use = env->tlb->nb_tlb;
}
-#endif /* !CONFIG_USER_ONLY */
-
static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
MMUAccessType access_type, int tlb_error)
{
@@ -484,8 +482,6 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
env->error_code = error_code;
}
-#if !defined(CONFIG_USER_ONLY)
-
hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
MIPSCPU *cpu = MIPS_CPU(cs);
@@ -833,7 +829,6 @@ refill:
return true;
}
#endif
-#endif /* !CONFIG_USER_ONLY */
bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
@@ -841,14 +836,11 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
{
MIPSCPU *cpu = MIPS_CPU(cs);
CPUMIPSState *env = &cpu->env;
-#if !defined(CONFIG_USER_ONLY)
hwaddr physical;
int prot;
-#endif
int ret = TLBRET_BADADDR;
/* data access */
-#if !defined(CONFIG_USER_ONLY)
/* XXX: put correct access by using cpu_restore_state() correctly */
ret = get_physical_address(env, &physical, &prot, address,
access_type, mmu_idx);
@@ -896,13 +888,11 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
if (probe) {
return false;
}
-#endif
raise_mmu_exception(env, address, access_type, ret);
do_raise_exception_err(env, cs->exception_index, env->error_code, retaddr);
}
-#ifndef CONFIG_USER_ONLY
hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
MMUAccessType access_type, uintptr_t retaddr)
{