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-rw-r--r--target/mips/cpu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 5335ac1..42efa98 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1005,6 +1005,7 @@ typedef struct CPUArchState {
*/
uint64_t CP0_WatchHi[8];
#define CP0WH_ASID 16
+#define CP0WH_M 31
/*
* CP0 Register 20
*/
@@ -1076,7 +1077,7 @@ typedef struct CPUArchState {
#define EXCP_INST_NOTAVAIL 0x2 /* No valid instruction word for BadInstr */
uint32_t hflags; /* CPU State */
/* TMASK defines different execution modes */
-#define MIPS_HFLAG_TMASK 0x1F5807FF
+#define MIPS_HFLAG_TMASK 0x3F5807FF
#define MIPS_HFLAG_MODE 0x00007 /* execution modes */
/*
* The KSU flags must be the lowest bits in hflags. The flag order