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-rw-r--r--target/m68k/cpu.c1
-rw-r--r--target/m68k/cpu.h9
-rw-r--r--target/m68k/helper.c3
3 files changed, 11 insertions, 2 deletions
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index ff3c4c1..37d2ed9 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -160,6 +160,7 @@ static void m68020_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_FPU);
m68k_set_feature(env, M68K_FEATURE_CAS);
m68k_set_feature(env, M68K_FEATURE_CHK2);
+ m68k_set_feature(env, M68K_FEATURE_MSP);
}
/*
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 5d2cb01..7c3feea 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -85,7 +85,13 @@ typedef struct CPUM68KState {
uint32_t pc;
uint32_t sr;
- /* SSP and USP. The current_sp is stored in aregs[7], the other here. */
+ /*
+ * The 68020/30/40 support two supervisor stacks, ISP and MSP.
+ * The 68000/10, Coldfire, and CPU32 only have USP/SSP.
+ *
+ * The current_sp is stored in aregs[7], the other here.
+ * The USP, SSP, and if used the additional ISP for 68020/30/40.
+ */
int current_sp;
uint32_t sp[3];
@@ -484,6 +490,7 @@ enum m68k_features {
M68K_FEATURE_CF_EMAC,
M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */
M68K_FEATURE_USP, /* User Stack Pointer. (680[012346]0, ISA A+, B or C).*/
+ M68K_FEATURE_MSP, /* Master Stack Pointer. (680[234]0) */
M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
M68K_FEATURE_WORD_INDEX, /* word sized address index registers. */
M68K_FEATURE_SCALED_INDEX, /* scaled address index registers. */
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 1efd6e4..4185ca9 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -463,7 +463,8 @@ void m68k_switch_sp(CPUM68KState *env)
env->sp[env->current_sp] = env->aregs[7];
if (m68k_feature(env, M68K_FEATURE_M68000)) {
if (env->sr & SR_S) {
- if (env->sr & SR_M) {
+ /* SR:Master-Mode bit unimplemented then ISP is not available */
+ if (!m68k_feature(env, M68K_FEATURE_MSP) || env->sr & SR_M) {
new_sp = M68K_SSP;
} else {
new_sp = M68K_ISP;