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Diffstat (limited to 'target/m68k/cpu.c')
| -rw-r--r-- | target/m68k/cpu.c | 324 |
1 files changed, 324 insertions, 0 deletions
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c new file mode 100644 index 0000000..ba17480 --- /dev/null +++ b/target/m68k/cpu.c @@ -0,0 +1,324 @@ +/* + * QEMU Motorola 68k CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * <http://www.gnu.org/licenses/lgpl-2.1.html> + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "cpu.h" +#include "qemu-common.h" +#include "migration/vmstate.h" +#include "exec/exec-all.h" + + +static void m68k_cpu_set_pc(CPUState *cs, vaddr value) +{ + M68kCPU *cpu = M68K_CPU(cs); + + cpu->env.pc = value; +} + +static bool m68k_cpu_has_work(CPUState *cs) +{ + return cs->interrupt_request & CPU_INTERRUPT_HARD; +} + +static void m68k_set_feature(CPUM68KState *env, int feature) +{ + env->features |= (1u << feature); +} + +/* CPUClass::reset() */ +static void m68k_cpu_reset(CPUState *s) +{ + M68kCPU *cpu = M68K_CPU(s); + M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu); + CPUM68KState *env = &cpu->env; + + mcc->parent_reset(s); + + memset(env, 0, offsetof(CPUM68KState, features)); +#if !defined(CONFIG_USER_ONLY) + env->sr = 0x2700; +#endif + m68k_switch_sp(env); + /* ??? FP regs should be initialized to NaN. */ + cpu_m68k_set_ccr(env, 0); + /* TODO: We should set PC from the interrupt vector. */ + env->pc = 0; + tlb_flush(s, 1); +} + +static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info) +{ + M68kCPU *cpu = M68K_CPU(s); + CPUM68KState *env = &cpu->env; + info->print_insn = print_insn_m68k; + if (m68k_feature(env, M68K_FEATURE_M68000)) { + info->mach = bfd_mach_m68040; + } +} + +/* CPU models */ + +static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model) +{ + ObjectClass *oc; + char *typename; + + if (cpu_model == NULL) { + return NULL; + } + + typename = g_strdup_printf("%s-" TYPE_M68K_CPU, cpu_model); + oc = object_class_by_name(typename); + g_free(typename); + if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL || + object_class_is_abstract(oc))) { + return NULL; + } + return oc; +} + +static void m5206_cpu_initfn(Object *obj) +{ + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + + m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); +} + +static void m68000_cpu_initfn(Object *obj) +{ + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + + m68k_set_feature(env, M68K_FEATURE_M68000); + m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); +} + +static void m68020_cpu_initfn(Object *obj) +{ + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + + m68k_set_feature(env, M68K_FEATURE_M68000); + m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); + m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV); + m68k_set_feature(env, M68K_FEATURE_BRAL); + m68k_set_feature(env, M68K_FEATURE_BCCL); + m68k_set_feature(env, M68K_FEATURE_BITFIELD); + m68k_set_feature(env, M68K_FEATURE_EXT_FULL); + m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX); + m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV); + m68k_set_feature(env, M68K_FEATURE_FPU); + m68k_set_feature(env, M68K_FEATURE_CAS); + m68k_set_feature(env, M68K_FEATURE_BKPT); +} +#define m68030_cpu_initfn m68020_cpu_initfn +#define m68040_cpu_initfn m68020_cpu_initfn + +static void m68060_cpu_initfn(Object *obj) +{ + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + + m68k_set_feature(env, M68K_FEATURE_M68000); + m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); + m68k_set_feature(env, M68K_FEATURE_BRAL); + m68k_set_feature(env, M68K_FEATURE_BCCL); + m68k_set_feature(env, M68K_FEATURE_BITFIELD); + m68k_set_feature(env, M68K_FEATURE_EXT_FULL); + m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX); + m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV); + m68k_set_feature(env, M68K_FEATURE_FPU); + m68k_set_feature(env, M68K_FEATURE_CAS); + m68k_set_feature(env, M68K_FEATURE_BKPT); +} + +static void m5208_cpu_initfn(Object *obj) +{ + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + + m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); + m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); + m68k_set_feature(env, M68K_FEATURE_BRAL); + m68k_set_feature(env, M68K_FEATURE_CF_EMAC); + m68k_set_feature(env, M68K_FEATURE_USP); +} + +static void cfv4e_cpu_initfn(Object *obj) +{ + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + + m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); + m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); + m68k_set_feature(env, M68K_FEATURE_BRAL); + m68k_set_feature(env, M68K_FEATURE_CF_FPU); + m68k_set_feature(env, M68K_FEATURE_CF_EMAC); + m68k_set_feature(env, M68K_FEATURE_USP); +} + +static void any_cpu_initfn(Object *obj) +{ + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + + m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); + m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); + m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); + m68k_set_feature(env, M68K_FEATURE_BRAL); + m68k_set_feature(env, M68K_FEATURE_CF_FPU); + /* MAC and EMAC are mututally exclusive, so pick EMAC. + It's mostly backwards compatible. */ + m68k_set_feature(env, M68K_FEATURE_CF_EMAC); + m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B); + m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_EXT_FULL); + m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); +} + +typedef struct M68kCPUInfo { + const char *name; + void (*instance_init)(Object *obj); +} M68kCPUInfo; + +static const M68kCPUInfo m68k_cpus[] = { + { .name = "m68000", .instance_init = m68000_cpu_initfn }, + { .name = "m68020", .instance_init = m68020_cpu_initfn }, + { .name = "m68030", .instance_init = m68030_cpu_initfn }, + { .name = "m68040", .instance_init = m68040_cpu_initfn }, + { .name = "m68060", .instance_init = m68060_cpu_initfn }, + { .name = "m5206", .instance_init = m5206_cpu_initfn }, + { .name = "m5208", .instance_init = m5208_cpu_initfn }, + { .name = "cfv4e", .instance_init = cfv4e_cpu_initfn }, + { .name = "any", .instance_init = any_cpu_initfn }, +}; + +static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) +{ + CPUState *cs = CPU(dev); + M68kCPU *cpu = M68K_CPU(dev); + M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev); + Error *local_err = NULL; + + cpu_exec_realizefn(cs, &local_err); + if (local_err != NULL) { + error_propagate(errp, local_err); + return; + } + + m68k_cpu_init_gdb(cpu); + + cpu_reset(cs); + qemu_init_vcpu(cs); + + mcc->parent_realize(dev, errp); +} + +static void m68k_cpu_initfn(Object *obj) +{ + CPUState *cs = CPU(obj); + M68kCPU *cpu = M68K_CPU(obj); + CPUM68KState *env = &cpu->env; + static bool inited; + + cs->env_ptr = env; + + if (tcg_enabled() && !inited) { + inited = true; + m68k_tcg_init(); + } +} + +static const VMStateDescription vmstate_m68k_cpu = { + .name = "cpu", + .unmigratable = 1, +}; + +static void m68k_cpu_class_init(ObjectClass *c, void *data) +{ + M68kCPUClass *mcc = M68K_CPU_CLASS(c); + CPUClass *cc = CPU_CLASS(c); + DeviceClass *dc = DEVICE_CLASS(c); + + mcc->parent_realize = dc->realize; + dc->realize = m68k_cpu_realizefn; + + mcc->parent_reset = cc->reset; + cc->reset = m68k_cpu_reset; + + cc->class_by_name = m68k_cpu_class_by_name; + cc->has_work = m68k_cpu_has_work; + cc->do_interrupt = m68k_cpu_do_interrupt; + cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt; + cc->dump_state = m68k_cpu_dump_state; + cc->set_pc = m68k_cpu_set_pc; + cc->gdb_read_register = m68k_cpu_gdb_read_register; + cc->gdb_write_register = m68k_cpu_gdb_write_register; +#ifdef CONFIG_USER_ONLY + cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault; +#else + cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; +#endif + cc->disas_set_info = m68k_cpu_disas_set_info; + + cc->gdb_num_core_regs = 18; + cc->gdb_core_xml_file = "cf-core.xml"; + + dc->vmsd = &vmstate_m68k_cpu; +} + +static void register_cpu_type(const M68kCPUInfo *info) +{ + TypeInfo type_info = { + .parent = TYPE_M68K_CPU, + .instance_init = info->instance_init, + }; + + type_info.name = g_strdup_printf("%s-" TYPE_M68K_CPU, info->name); + type_register(&type_info); + g_free((void *)type_info.name); +} + +static const TypeInfo m68k_cpu_type_info = { + .name = TYPE_M68K_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(M68kCPU), + .instance_init = m68k_cpu_initfn, + .abstract = true, + .class_size = sizeof(M68kCPUClass), + .class_init = m68k_cpu_class_init, +}; + +static void m68k_cpu_register_types(void) +{ + int i; + + type_register_static(&m68k_cpu_type_info); + for (i = 0; i < ARRAY_SIZE(m68k_cpus); i++) { + register_cpu_type(&m68k_cpus[i]); + } +} + +type_init(m68k_cpu_register_types) |