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-rw-r--r--target/arm/tcg/translate.c5
-rw-r--r--target/arm/tcg/translate.h1
2 files changed, 0 insertions, 6 deletions
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index f414a89..4828fbf 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -672,7 +672,6 @@ void arm_test_cc(DisasCompare *cmp, int cc)
{
TCGv_i32 value;
TCGCond cond;
- bool global = true;
switch (cc) {
case 0: /* eq: Z */
@@ -703,7 +702,6 @@ void arm_test_cc(DisasCompare *cmp, int cc)
case 9: /* ls: !C || Z -> !(C && !Z) */
cond = TCG_COND_NE;
value = tcg_temp_new_i32();
- global = false;
/* CF is 1 for C, so -CF is an all-bits-set mask for C;
ZF is non-zero for !Z; so AND the two subexpressions. */
tcg_gen_neg_i32(value, cpu_CF);
@@ -715,7 +713,6 @@ void arm_test_cc(DisasCompare *cmp, int cc)
/* Since we're only interested in the sign bit, == 0 is >= 0. */
cond = TCG_COND_GE;
value = tcg_temp_new_i32();
- global = false;
tcg_gen_xor_i32(value, cpu_VF, cpu_NF);
break;
@@ -723,7 +720,6 @@ void arm_test_cc(DisasCompare *cmp, int cc)
case 13: /* le: Z || N != V */
cond = TCG_COND_NE;
value = tcg_temp_new_i32();
- global = false;
/* (N == V) is equal to the sign bit of ~(NF ^ VF). Propagate
* the sign bit then AND with ZF to yield the result. */
tcg_gen_xor_i32(value, cpu_VF, cpu_NF);
@@ -751,7 +747,6 @@ void arm_test_cc(DisasCompare *cmp, int cc)
no_invert:
cmp->cond = cond;
cmp->value = value;
- cmp->value_global = global;
}
void arm_jump_cc(DisasCompare *cmp, TCGLabel *label)
diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
index 5c37574..853a0b8 100644
--- a/target/arm/tcg/translate.h
+++ b/target/arm/tcg/translate.h
@@ -157,7 +157,6 @@ typedef struct DisasContext {
typedef struct DisasCompare {
TCGCond cond;
TCGv_i32 value;
- bool value_global;
} DisasCompare;
/* Share the TCG temporaries common between 32 and 64 bit modes. */