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-rw-r--r--target/arm/cpu64.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 1549400..dd69618 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -646,8 +646,9 @@ static void aarch64_max_initfn(Object *obj)
t = cpu->isar.id_aa64pfr1;
t = FIELD_DP64(t, ID_AA64PFR1, BT, 1);
/*
- * Begin with full support for MTE; will be downgraded to MTE=1
- * during realize if the board provides no tag memory.
+ * Begin with full support for MTE. This will be downgraded to MTE=0
+ * during realize if the board provides no tag memory, much like
+ * we do for EL2 with the virtualization=on property.
*/
t = FIELD_DP64(t, ID_AA64PFR1, MTE, 2);
cpu->isar.id_aa64pfr1 = t;