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-rw-r--r--target-sh4/helper.h1
-rw-r--r--target-sh4/op_helper.c20
-rw-r--r--target-sh4/translate.c12
3 files changed, 33 insertions, 0 deletions
diff --git a/target-sh4/helper.h b/target-sh4/helper.h
index 4b2fcdd..544031c 100644
--- a/target-sh4/helper.h
+++ b/target-sh4/helper.h
@@ -49,5 +49,6 @@ DEF_HELPER_1(fsqrt_FT, i32, i32)
DEF_HELPER_1(fsqrt_DT, i64, i64)
DEF_HELPER_1(ftrc_FT, i32, i32)
DEF_HELPER_1(ftrc_DT, i32, i64)
+DEF_HELPER_2(fipr, void, i32, i32)
#include "def-helper.h"
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index aea0eb1..030f60d 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -782,3 +782,23 @@ uint32_t helper_ftrc_DT(uint64_t t0)
update_fpscr(GETPC());
return ret;
}
+
+void helper_fipr(uint32_t m, uint32_t n)
+{
+ int bank, i;
+ float32 r, p;
+
+ bank = (env->sr & FPSCR_FR) ? 16 : 0;
+ r = float32_zero;
+ set_float_exception_flags(0, &env->fp_status);
+
+ for (i = 0 ; i < 4 ; i++) {
+ p = float32_mul(env->fregs[bank + m + i],
+ env->fregs[bank + n + i],
+ &env->fp_status);
+ r = float32_add(r, p, &env->fp_status);
+ }
+ update_fpscr(GETPC());
+
+ env->fregs[bank + n + 3] = r;
+}
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 8b2f1fc..557550f 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1859,6 +1859,18 @@ static void _decode_opc(DisasContext * ctx)
tcg_temp_free_i64(fp);
}
return;
+ case 0xf0ed: /* fipr FVm,FVn */
+ CHECK_FPU_ENABLED
+ if ((ctx->fpscr & FPSCR_PR) == 0) {
+ TCGv m, n;
+ m = tcg_const_i32((ctx->opcode >> 16) & 3);
+ n = tcg_const_i32((ctx->opcode >> 18) & 3);
+ gen_helper_fipr(m, n);
+ tcg_temp_free(m);
+ tcg_temp_free(n);
+ return;
+ }
+ break;
}
#if 0
fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n",