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-rw-r--r--target-openrisc/exception.c2
-rw-r--r--target-openrisc/mmu_helper.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/target-openrisc/exception.c b/target-openrisc/exception.c
index b96f3f8..74652a5 100644
--- a/target-openrisc/exception.c
+++ b/target-openrisc/exception.c
@@ -25,5 +25,5 @@ void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp)
CPUState *cs = CPU(cpu);
cs->exception_index = excp;
- cpu_loop_exit(&cpu->env);
+ cpu_loop_exit(cs);
}
diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c
index e3fe6c7..5f7f6f5 100644
--- a/target-openrisc/mmu_helper.c
+++ b/target-openrisc/mmu_helper.c
@@ -52,7 +52,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
cpu_restore_state(env, retaddr);
}
/* Raise Exception. */
- cpu_loop_exit(env);
+ cpu_loop_exit(cs);
}
}
#endif