diff options
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/op_helper.c | 2 | ||||
| -rw-r--r-- | target-arm/translate.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 5d9fd84..5b5581f 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -97,7 +97,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) saved_env = env; env = cpu_single_env; ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); - if (__builtin_expect(ret, 0)) { + if (unlikely(ret)) { if (retaddr) { /* now we have a real cpu fault */ pc = (unsigned long)retaddr; diff --git a/target-arm/translate.c b/target-arm/translate.c index e03de44..a3aabd2 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -3393,7 +3393,7 @@ static inline void gen_goto_tb(DisasContext *s, int n, uint32_t dest) static inline void gen_jmp (DisasContext *s, uint32_t dest) { - if (__builtin_expect(s->singlestep_enabled, 0)) { + if (unlikely(s->singlestep_enabled)) { /* An indirect jump so that we still trigger the debug exception. */ if (s->thumb) dest |= 1; @@ -8703,7 +8703,7 @@ static inline int gen_intermediate_code_internal(CPUState *env, /* At this stage dc->condjmp will only be set when the skipped instruction was a conditional branch or trap, and the PC has already been written. */ - if (__builtin_expect(env->singlestep_enabled, 0)) { + if (unlikely(env->singlestep_enabled)) { /* Make sure the pc is updated, and raise a debug exception. */ if (dc->condjmp) { gen_set_condexec(dc); |