diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/arm/armsse-version.h | 42 | ||||
-rw-r--r-- | include/hw/misc/iotkit-sysctl.h | 7 |
2 files changed, 45 insertions, 4 deletions
diff --git a/include/hw/arm/armsse-version.h b/include/hw/arm/armsse-version.h new file mode 100644 index 0000000..60780fa --- /dev/null +++ b/include/hw/arm/armsse-version.h @@ -0,0 +1,42 @@ +/* + * ARM SSE (Subsystems for Embedded): IoTKit, SSE-200 + * + * Copyright (c) 2020 Linaro Limited + * Written by Peter Maydell + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +#ifndef ARMSSE_VERSION_H +#define ARMSSE_VERSION_H + + +/* + * Define an enumeration of the possible values of the sse-version + * property implemented by various sub-devices of the SSE, and + * a validation function that checks that a valid value has been passed. + * These are arbitrary QEMU-internal values (nobody should be creating + * the sub-devices of the SSE except for the SSE object itself), but + * we pick obvious numbers for the benefit of people debugging with gdb. + */ +enum { + ARMSSE_IOTKIT = 0, + ARMSSE_SSE200 = 200, + ARMSSE_SSE300 = 300, +}; + +static inline bool armsse_version_valid(uint32_t sse_version) +{ + switch (sse_version) { + case ARMSSE_IOTKIT: + case ARMSSE_SSE200: + case ARMSSE_SSE300: + return true; + default: + return false; + } +} + +#endif diff --git a/include/hw/misc/iotkit-sysctl.h b/include/hw/misc/iotkit-sysctl.h index 2bc3911..7cdafea 100644 --- a/include/hw/misc/iotkit-sysctl.h +++ b/include/hw/misc/iotkit-sysctl.h @@ -17,9 +17,8 @@ * "system control register" blocks. * * QEMU interface: - * + QOM property "SYS_VERSION": value of the SYS_VERSION register of the - * system information block of the SSE - * (used to identify whether to provide SSE-200-only registers) + * + QOM property "sse-version": indicates which SSE version this is part of + * (used to identify whether to provide SSE-200-only registers, etc) * + sysbus MMIO region 0: the system information register bank * + sysbus MMIO region 1: the system control register bank */ @@ -61,7 +60,7 @@ struct IoTKitSysCtl { uint32_t pdcm_pd_sram3_sense; /* Properties */ - uint32_t sys_version; + uint32_t sse_version; uint32_t cpuwait_rst; uint32_t initsvtor0_rst; uint32_t initsvtor1_rst; |