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-rw-r--r--include/hw/pci-host/apb.h54
-rw-r--r--include/hw/pci-host/spapr.h2
2 files changed, 50 insertions, 6 deletions
diff --git a/include/hw/pci-host/apb.h b/include/hw/pci-host/apb.h
index b19bd55..604d899 100644
--- a/include/hw/pci-host/apb.h
+++ b/include/hw/pci-host/apb.h
@@ -1,10 +1,54 @@
#ifndef PCI_HOST_APB_H
#define PCI_HOST_APB_H
-#include "qemu-common.h"
+#include "hw/sparc/sun4u_iommu.h"
+
+#define MAX_IVEC 0x40
+
+/* OBIO IVEC IRQs */
+#define OBIO_HDD_IRQ 0x20
+#define OBIO_NIC_IRQ 0x21
+#define OBIO_LPT_IRQ 0x22
+#define OBIO_FDD_IRQ 0x27
+#define OBIO_KBD_IRQ 0x29
+#define OBIO_MSE_IRQ 0x2a
+#define OBIO_SER_IRQ 0x2b
+
+#define TYPE_APB "pbm"
+
+#define APB_DEVICE(obj) \
+ OBJECT_CHECK(APBState, (obj), TYPE_APB)
+
+typedef struct APBState {
+ PCIHostState parent_obj;
+
+ hwaddr special_base;
+ hwaddr mem_base;
+ MemoryRegion apb_config;
+ MemoryRegion pci_config;
+ MemoryRegion pci_mmio;
+ MemoryRegion pci_ioport;
+ uint64_t pci_irq_in;
+ IOMMUState *iommu;
+ PCIBridge *bridgeA;
+ PCIBridge *bridgeB;
+ uint32_t pci_control[16];
+ uint32_t pci_irq_map[8];
+ uint32_t pci_err_irq_map[4];
+ uint32_t obio_irq_map[32];
+ qemu_irq ivec_irqs[MAX_IVEC];
+ unsigned int irq_request;
+ uint32_t reset_control;
+ unsigned int nr_resets;
+} APBState;
+
+typedef struct PBMPCIBridge {
+ /*< private >*/
+ PCIBridge parent_obj;
+} PBMPCIBridge;
+
+#define TYPE_PBM_PCI_BRIDGE "pbm-bridge"
+#define PBM_PCI_BRIDGE(obj) \
+ OBJECT_CHECK(PBMPCIBridge, (obj), TYPE_PBM_PCI_BRIDGE)
-PCIBus *pci_apb_init(hwaddr special_base,
- hwaddr mem_base,
- qemu_irq *ivec_irqs, PCIBus **bus2, PCIBus **bus3,
- qemu_irq **pbm_irqs);
#endif
diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h
index 38470b2..0fae4fc 100644
--- a/include/hw/pci-host/spapr.h
+++ b/include/hw/pci-host/spapr.h
@@ -108,7 +108,7 @@ static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
- return xics_get_qirq(XICS_FABRIC(spapr), phb->lsi_table[pin].irq);
+ return spapr_qirq(spapr, phb->lsi_table[pin].irq);
}
PCIHostState *spapr_create_phb(sPAPRMachineState *spapr, int index);