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Diffstat (limited to 'hw')
-rw-r--r--hw/core/machine.c1
-rw-r--r--hw/i386/amd_iommu.c2
-rw-r--r--hw/i386/intel_iommu.c4
-rw-r--r--hw/i386/sgx.c15
-rw-r--r--hw/ide/core.c43
-rw-r--r--hw/ide/qdev.c32
6 files changed, 75 insertions, 22 deletions
diff --git a/hw/core/machine.c b/hw/core/machine.c
index f589b92..616f3a2 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -12,6 +12,7 @@
#include "qemu/osdep.h"
#include "qemu/option.h"
+#include "qemu/accel.h"
#include "qapi/qmp/qerror.h"
#include "sysemu/replay.h"
#include "qemu/units.h"
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 725f690..bcd016f 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1368,7 +1368,7 @@ static MemTxResult amdvi_mem_ir_write(void *opaque, hwaddr addr,
return MEMTX_ERROR;
}
- apic_get_class()->send_msi(&to);
+ apic_get_class(NULL)->send_msi(&to);
trace_amdvi_mem_ir_write(to.address, to.data);
return MEMTX_OK;
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index a08ee85..98a5c30 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -396,7 +396,7 @@ static void vtd_generate_interrupt(IntelIOMMUState *s, hwaddr mesg_addr_reg,
trace_vtd_irq_generate(msi.address, msi.data);
- apic_get_class()->send_msi(&msi);
+ apic_get_class(NULL)->send_msi(&msi);
}
/* Generate a fault event to software via MSI if conditions are met.
@@ -3529,7 +3529,7 @@ static MemTxResult vtd_mem_ir_write(void *opaque, hwaddr addr,
return MEMTX_ERROR;
}
- apic_get_class()->send_msi(&to);
+ apic_get_class(NULL)->send_msi(&to);
return MEMTX_OK;
}
diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c
index 09d9c7c..db004d1 100644
--- a/hw/i386/sgx.c
+++ b/hw/i386/sgx.c
@@ -83,7 +83,7 @@ static uint64_t sgx_calc_section_metric(uint64_t low, uint64_t high)
((high & MAKE_64BIT_MASK(0, 20)) << 32);
}
-static SGXEPCSectionList *sgx_calc_host_epc_sections(uint64_t *size)
+static SGXEPCSectionList *sgx_calc_host_epc_sections(void)
{
SGXEPCSectionList *head = NULL, **tail = &head;
SGXEPCSection *section;
@@ -106,7 +106,6 @@ static SGXEPCSectionList *sgx_calc_host_epc_sections(uint64_t *size)
section = g_new0(SGXEPCSection, 1);
section->node = j++;
section->size = sgx_calc_section_metric(ecx, edx);
- *size += section->size;
QAPI_LIST_APPEND(tail, section);
}
@@ -157,7 +156,6 @@ SGXInfo *qmp_query_sgx_capabilities(Error **errp)
{
SGXInfo *info = NULL;
uint32_t eax, ebx, ecx, edx;
- uint64_t size = 0;
int fd = qemu_open_old("/dev/sgx_vepc", O_RDWR);
if (fd < 0) {
@@ -175,8 +173,7 @@ SGXInfo *qmp_query_sgx_capabilities(Error **errp)
info->sgx1 = eax & (1U << 0) ? true : false;
info->sgx2 = eax & (1U << 1) ? true : false;
- info->sections = sgx_calc_host_epc_sections(&size);
- info->section_size = size;
+ info->sections = sgx_calc_host_epc_sections();
close(fd);
@@ -223,14 +220,12 @@ SGXInfo *qmp_query_sgx(Error **errp)
return NULL;
}
- SGXEPCState *sgx_epc = &pcms->sgx_epc;
info = g_new0(SGXInfo, 1);
info->sgx = true;
info->sgx1 = true;
info->sgx2 = true;
info->flc = true;
- info->section_size = sgx_epc->size;
info->sections = sgx_get_epc_sections_list();
return info;
@@ -241,6 +236,7 @@ void hmp_info_sgx(Monitor *mon, const QDict *qdict)
Error *err = NULL;
SGXEPCSectionList *section_list, *section;
g_autoptr(SGXInfo) info = qmp_query_sgx(&err);
+ uint64_t size = 0;
if (err) {
error_report_err(err);
@@ -254,8 +250,6 @@ void hmp_info_sgx(Monitor *mon, const QDict *qdict)
info->sgx2 ? "enabled" : "disabled");
monitor_printf(mon, "FLC support: %s\n",
info->flc ? "enabled" : "disabled");
- monitor_printf(mon, "size: %" PRIu64 "\n",
- info->section_size);
section_list = info->sections;
for (section = section_list; section; section = section->next) {
@@ -263,7 +257,10 @@ void hmp_info_sgx(Monitor *mon, const QDict *qdict)
section->value->node);
monitor_printf(mon, "size=%" PRIu64 "\n",
section->value->size);
+ size += section->value->size;
}
+ monitor_printf(mon, "total size=%" PRIu64 "\n",
+ size);
}
bool sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size)
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 39afdc0..5d10393 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -1648,6 +1648,13 @@ static bool cmd_set_features(IDEState *s, uint8_t cmd)
/* XXX: valid for CDROM ? */
switch (s->feature) {
+ case 0x01: /* 8-bit I/O enable (CompactFlash) */
+ case 0x81: /* 8-bit I/O disable (CompactFlash) */
+ if (s->drive_kind != IDE_CFATA) {
+ goto abort_cmd;
+ }
+ s->io8 = !(s->feature & 0x80);
+ return true;
case 0x02: /* write cache enable */
blk_set_enable_write_cache(s->blk, true);
identify_data = (uint16_t *)s->identify_data;
@@ -2374,12 +2381,20 @@ void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
}
p = s->data_ptr;
- if (p + 2 > s->data_end) {
- return;
- }
+ if (s->io8) {
+ if (p + 1 > s->data_end) {
+ return;
+ }
+
+ *p++ = val;
+ } else {
+ if (p + 2 > s->data_end) {
+ return;
+ }
- *(uint16_t *)p = le16_to_cpu(val);
- p += 2;
+ *(uint16_t *)p = le16_to_cpu(val);
+ p += 2;
+ }
s->data_ptr = p;
if (p >= s->data_end) {
s->status &= ~DRQ_STAT;
@@ -2401,12 +2416,20 @@ uint32_t ide_data_readw(void *opaque, uint32_t addr)
}
p = s->data_ptr;
- if (p + 2 > s->data_end) {
- return 0;
- }
+ if (s->io8) {
+ if (p + 1 > s->data_end) {
+ return 0;
+ }
- ret = cpu_to_le16(*(uint16_t *)p);
- p += 2;
+ ret = *p++;
+ } else {
+ if (p + 2 > s->data_end) {
+ return 0;
+ }
+
+ ret = cpu_to_le16(*(uint16_t *)p);
+ p += 2;
+ }
s->data_ptr = p;
if (p >= s->data_end) {
s->status &= ~DRQ_STAT;
diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c
index 618045b..6f6c746 100644
--- a/hw/ide/qdev.c
+++ b/hw/ide/qdev.c
@@ -283,6 +283,11 @@ static void ide_cd_realize(IDEDevice *dev, Error **errp)
ide_dev_initfn(dev, IDE_CD, errp);
}
+static void ide_cf_realize(IDEDevice *dev, Error **errp)
+{
+ ide_dev_initfn(dev, IDE_CFATA, errp);
+}
+
#define DEFINE_IDE_DEV_PROPERTIES() \
DEFINE_BLOCK_PROPERTIES(IDEDrive, dev.conf), \
DEFINE_BLOCK_ERROR_PROPERTIES(IDEDrive, dev.conf), \
@@ -341,6 +346,32 @@ static const TypeInfo ide_cd_info = {
.class_init = ide_cd_class_init,
};
+static Property ide_cf_properties[] = {
+ DEFINE_IDE_DEV_PROPERTIES(),
+ DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf),
+ DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans",
+ IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ide_cf_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ IDEDeviceClass *k = IDE_DEVICE_CLASS(klass);
+
+ k->realize = ide_cf_realize;
+ dc->fw_name = "drive";
+ dc->desc = "virtual CompactFlash card";
+ device_class_set_props(dc, ide_cf_properties);
+}
+
+static const TypeInfo ide_cf_info = {
+ .name = "ide-cf",
+ .parent = TYPE_IDE_DEVICE,
+ .instance_size = sizeof(IDEDrive),
+ .class_init = ide_cf_class_init,
+};
+
static void ide_device_class_init(ObjectClass *klass, void *data)
{
DeviceClass *k = DEVICE_CLASS(klass);
@@ -365,6 +396,7 @@ static void ide_register_types(void)
type_register_static(&ide_bus_info);
type_register_static(&ide_hd_info);
type_register_static(&ide_cd_info);
+ type_register_static(&ide_cf_info);
type_register_static(&ide_device_type_info);
}
generated by cgit v1.1 at 2025-03-21 21:15:19 +0000