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-rw-r--r--hw/ide/macio.c2
-rw-r--r--hw/misc/macio/macio.c42
-rw-r--r--hw/pci-host/grackle.c17
-rw-r--r--hw/pci-host/uninorth.c16
-rw-r--r--hw/ppc/mac.h26
-rw-r--r--hw/ppc/mac_newworld.c59
-rw-r--r--hw/ppc/mac_oldworld.c59
-rw-r--r--hw/ppc/ppc405_boards.c14
-rw-r--r--hw/ppc/ppc440_bamboo.c7
-rw-r--r--hw/ppc/sam460ex.c7
-rw-r--r--hw/ppc/spapr.c3
-rw-r--r--hw/ppc/spapr_cpu_core.c11
-rw-r--r--hw/ppc/spapr_pci.c2
-rw-r--r--hw/ppc/spapr_rtas.c2
-rw-r--r--hw/ppc/virtex_ml507.c7
15 files changed, 194 insertions, 80 deletions
diff --git a/hw/ide/macio.c b/hw/ide/macio.c
index d3a85cb..bab8c45 100644
--- a/hw/ide/macio.c
+++ b/hw/ide/macio.c
@@ -26,6 +26,7 @@
#include "hw/hw.h"
#include "hw/ppc/mac.h"
#include "hw/ppc/mac_dbdma.h"
+#include "hw/misc/macio/macio.h"
#include "sysemu/block-backend.h"
#include "sysemu/dma.h"
@@ -460,6 +461,7 @@ static void macio_ide_initfn(Object *obj)
static Property macio_ide_properties[] = {
DEFINE_PROP_UINT32("channel", MACIOIDEState, channel, 0),
+ DEFINE_PROP_UINT32("addr", MACIOIDEState, addr, -1),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
index 52aa377..94da85c 100644
--- a/hw/misc/macio/macio.c
+++ b/hw/misc/macio/macio.c
@@ -90,6 +90,15 @@ static void macio_bar_setup(MacIOState *s)
macio_escc_legacy_setup(s);
}
+static void macio_init_child_obj(MacIOState *s, const char *childname,
+ void *child, size_t childsize,
+ const char *childtype)
+{
+ object_initialize_child(OBJECT(s), childname, child, childsize, childtype,
+ &error_abort, NULL);
+ qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus));
+}
+
static void macio_common_realize(PCIDevice *d, Error **errp)
{
MacIOState *s = MACIO(d);
@@ -210,10 +219,11 @@ static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
int index)
{
gchar *name = g_strdup_printf("ide[%i]", index);
+ uint32_t addr = 0x1f000 + ((index + 1) * 0x1000);
- sysbus_init_child_obj(OBJECT(s), name, ide, ide_size, TYPE_MACIO_IDE);
- memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
- &ide->mem);
+ macio_init_child_obj(s, name, ide, ide_size, TYPE_MACIO_IDE);
+ qdev_prop_set_uint32(DEVICE(ide), "addr", addr);
+ memory_region_add_subregion(&s->bar, addr, &ide->mem);
g_free(name);
}
@@ -229,7 +239,7 @@ static void macio_oldworld_init(Object *obj)
qdev_prop_allow_set_link_before_realize,
0, NULL);
- sysbus_init_child_obj(obj, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA);
+ macio_init_child_obj(s, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA);
object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
dev = DEVICE(&os->nvram);
@@ -340,7 +350,7 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio",
&error_abort);
qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb);
- qdev_set_parent_bus(DEVICE(&s->pmu), sysbus_get_default());
+ qdev_set_parent_bus(DEVICE(&s->pmu), BUS(&s->macio_bus));
object_property_add_child(OBJECT(s), "pmu", OBJECT(&s->pmu), NULL);
object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err);
@@ -356,7 +366,7 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
} else {
/* CUDA */
object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
- qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
+ qdev_set_parent_bus(DEVICE(&s->cuda), BUS(&s->macio_bus));
object_property_add_child(OBJECT(s), "cuda", OBJECT(&s->cuda), NULL);
qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
s->frequency);
@@ -385,8 +395,8 @@ static void macio_newworld_init(Object *obj)
qdev_prop_allow_set_link_before_realize,
0, NULL);
- sysbus_init_child_obj(obj, "gpio", &ns->gpio, sizeof(ns->gpio),
- TYPE_MACIO_GPIO);
+ macio_init_child_obj(s, "gpio", &ns->gpio, sizeof(ns->gpio),
+ TYPE_MACIO_GPIO);
for (i = 0; i < 2; i++) {
macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
@@ -399,10 +409,13 @@ static void macio_instance_init(Object *obj)
memory_region_init(&s->bar, obj, "macio", 0x80000);
- sysbus_init_child_obj(obj, "dbdma", &s->dbdma, sizeof(s->dbdma),
- TYPE_MAC_DBDMA);
+ qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS,
+ DEVICE(obj), "macio.0");
- sysbus_init_child_obj(obj, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC);
+ macio_init_child_obj(s, "dbdma", &s->dbdma, sizeof(s->dbdma),
+ TYPE_MAC_DBDMA);
+
+ macio_init_child_obj(s, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC);
}
static const VMStateDescription vmstate_macio_oldworld = {
@@ -470,6 +483,12 @@ static void macio_class_init(ObjectClass *klass, void *data)
dc->user_creatable = false;
}
+static const TypeInfo macio_bus_info = {
+ .name = TYPE_MACIO_BUS,
+ .parent = TYPE_BUS,
+ .instance_size = sizeof(MacIOBusState),
+};
+
static const TypeInfo macio_oldworld_type_info = {
.name = TYPE_OLDWORLD_MACIO,
.parent = TYPE_MACIO,
@@ -501,6 +520,7 @@ static const TypeInfo macio_type_info = {
static void macio_register_types(void)
{
+ type_register_static(&macio_bus_info);
type_register_static(&macio_type_info);
type_register_static(&macio_oldworld_type_info);
type_register_static(&macio_newworld_type_info);
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index 4810a4d..5a151e9 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -37,6 +37,7 @@
typedef struct GrackleState {
PCIHostState parent_obj;
+ uint32_t ofw_addr;
HeathrowState *pic;
qemu_irq irqs[4];
MemoryRegion pci_mmio;
@@ -146,12 +147,28 @@ static const TypeInfo grackle_pci_info = {
},
};
+static char *grackle_ofw_unit_address(const SysBusDevice *dev)
+{
+ GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
+
+ return g_strdup_printf("%x", s->ofw_addr);
+}
+
+static Property grackle_properties[] = {
+ DEFINE_PROP_UINT32("ofw-addr", GrackleState, ofw_addr, -1),
+ DEFINE_PROP_END_OF_LIST()
+};
+
static void grackle_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
dc->realize = grackle_realize;
+ dc->props = grackle_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
+ dc->fw_name = "pci";
+ sbc->explicit_ofw_unit_address = grackle_ofw_unit_address;
}
static const TypeInfo grackle_host_info = {
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index a843aa7..1378c5c 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -118,6 +118,13 @@ static void pci_unin_init_irqs(UNINHostState *s)
}
}
+static char *pci_unin_main_ofw_unit_address(const SysBusDevice *dev)
+{
+ UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
+
+ return g_strdup_printf("%x", s->ofw_addr);
+}
+
static void pci_unin_main_realize(DeviceState *dev, Error **errp)
{
UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
@@ -455,12 +462,21 @@ static const TypeInfo unin_internal_pci_host_info = {
},
};
+static Property pci_unin_main_pci_host_props[] = {
+ DEFINE_PROP_UINT32("ofw-addr", UNINHostState, ofw_addr, -1),
+ DEFINE_PROP_END_OF_LIST()
+};
+
static void pci_unin_main_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
dc->realize = pci_unin_main_realize;
+ dc->props = pci_unin_main_pci_host_props;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
+ dc->fw_name = "pci";
+ sbc->explicit_ofw_unit_address = pci_unin_main_ofw_unit_address;
}
static const TypeInfo pci_unin_main_info = {
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index 41fd289..a741300 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -86,32 +86,6 @@ typedef struct Core99MachineState {
uint8_t via_config;
} Core99MachineState;
-/* MacIO */
-#define TYPE_MACIO_IDE "macio-ide"
-#define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE)
-
-typedef struct MACIOIDEState {
- /*< private >*/
- SysBusDevice parent_obj;
- /*< public >*/
- uint32_t channel;
- qemu_irq real_ide_irq;
- qemu_irq real_dma_irq;
- qemu_irq ide_irq;
- qemu_irq dma_irq;
-
- MemoryRegion mem;
- IDEBus bus;
- IDEDMA dma;
- void *dbdma;
- bool dma_active;
- uint32_t timing_reg;
- uint32_t irq_reg;
-} MACIOIDEState;
-
-void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
-void macio_ide_register_dma(MACIOIDEState *ide);
-
/* Grackle PCI */
#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index a6b95f0..a630cb8 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -64,6 +64,7 @@
#include "hw/ppc/openpic.h"
#include "hw/ide.h"
#include "hw/loader.h"
+#include "hw/fw-path-provider.h"
#include "elf.h"
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
@@ -344,6 +345,7 @@ static void ppc_core99_init(MachineState *machine)
/* Uninorth main bus */
dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
+ qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
&error_abort);
qdev_init_nofail(dev);
@@ -520,6 +522,54 @@ static void ppc_core99_init(MachineState *machine)
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
+/*
+ * Implementation of an interface to adjust firmware path
+ * for the bootindex property handling.
+ */
+static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
+ DeviceState *dev)
+{
+ PCIDevice *pci;
+ IDEBus *ide_bus;
+ IDEState *ide_s;
+ MACIOIDEState *macio_ide;
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
+ pci = PCI_DEVICE(dev);
+ return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
+ macio_ide = MACIO_IDE(dev);
+ return g_strdup_printf("ata-3@%x", macio_ide->addr);
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
+ ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
+ ide_s = idebus_active_if(ide_bus);
+
+ if (ide_s->drive_kind == IDE_CD) {
+ return g_strdup("cdrom");
+ }
+
+ return g_strdup("hd");
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
+ return g_strdup("hd");
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
+ return g_strdup("cdrom");
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
+ return g_strdup("disk");
+ }
+
+ return NULL;
+}
+
static int core99_kvm_type(const char *arg)
{
/* Always force PR KVM */
@@ -529,6 +579,7 @@ static int core99_kvm_type(const char *arg)
static void core99_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
mc->desc = "Mac99 based PowerMAC";
mc->init = ppc_core99_init;
@@ -542,6 +593,8 @@ static void core99_machine_class_init(ObjectClass *oc, void *data)
#else
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
#endif
+ mc->ignore_boot_device_suffixes = true;
+ fwc->get_dev_path = core99_fw_dev_path;
}
static char *core99_get_via_config(Object *obj, Error **errp)
@@ -598,7 +651,11 @@ static const TypeInfo core99_machine_info = {
.parent = TYPE_MACHINE,
.class_init = core99_machine_class_init,
.instance_init = core99_instance_init,
- .instance_size = sizeof(Core99MachineState)
+ .instance_size = sizeof(Core99MachineState),
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_FW_PATH_PROVIDER },
+ { }
+ },
};
static void mac_machine_register_types(void)
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 80b5525..9891c32 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -42,6 +42,7 @@
#include "hw/misc/macio/macio.h"
#include "hw/ide.h"
#include "hw/loader.h"
+#include "hw/fw-path-provider.h"
#include "elf.h"
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
@@ -254,6 +255,7 @@ static void ppc_heathrow_init(MachineState *machine)
/* Grackle PCI host bridge */
dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
+ qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
&error_abort);
qdev_init_nofail(dev);
@@ -372,6 +374,54 @@ static void ppc_heathrow_init(MachineState *machine)
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
+/*
+ * Implementation of an interface to adjust firmware path
+ * for the bootindex property handling.
+ */
+static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus,
+ DeviceState *dev)
+{
+ PCIDevice *pci;
+ IDEBus *ide_bus;
+ IDEState *ide_s;
+ MACIOIDEState *macio_ide;
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) {
+ pci = PCI_DEVICE(dev);
+ return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
+ macio_ide = MACIO_IDE(dev);
+ return g_strdup_printf("ata-3@%x", macio_ide->addr);
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
+ ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
+ ide_s = idebus_active_if(ide_bus);
+
+ if (ide_s->drive_kind == IDE_CD) {
+ return g_strdup("cdrom");
+ }
+
+ return g_strdup("hd");
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
+ return g_strdup("hd");
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
+ return g_strdup("cdrom");
+ }
+
+ if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
+ return g_strdup("disk");
+ }
+
+ return NULL;
+}
+
static int heathrow_kvm_type(const char *arg)
{
/* Always force PR KVM */
@@ -381,6 +431,7 @@ static int heathrow_kvm_type(const char *arg)
static void heathrow_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
mc->desc = "Heathrow based PowerMAC";
mc->init = ppc_heathrow_init;
@@ -394,12 +445,18 @@ static void heathrow_class_init(ObjectClass *oc, void *data)
mc->kvm_type = heathrow_kvm_type;
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
mc->default_display = "std";
+ mc->ignore_boot_device_suffixes = true;
+ fwc->get_dev_path = heathrow_fw_dev_path;
}
static const TypeInfo ppc_heathrow_machine_info = {
.name = MACHINE_TYPE_NAME("g3beige"),
.parent = TYPE_MACHINE,
- .class_init = heathrow_class_init
+ .class_init = heathrow_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_FW_PATH_PROVIDER },
+ { }
+ },
};
static void ppc_heathrow_register_types(void)
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index f5a9c24..3be3fe4 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -162,13 +162,6 @@ static void ref405ep_init(MachineState *machine)
DriveInfo *dinfo;
MemoryRegion *sysmem = get_system_memory();
-#ifdef TARGET_PPCEMB
- if (!qtest_enabled()) {
- warn_report("qemu-system-ppcemb is deprecated, "
- "please use qemu-system-ppc instead.");
- }
-#endif
-
/* XXX: fix this */
memory_region_allocate_system_memory(&ram_memories[0], NULL, "ef405ep.ram",
0x08000000);
@@ -463,13 +456,6 @@ static void taihu_405ep_init(MachineState *machine)
int fl_idx, fl_sectors;
DriveInfo *dinfo;
-#ifdef TARGET_PPCEMB
- if (!qtest_enabled()) {
- warn_report("qemu-system-ppcemb is deprecated, "
- "please use qemu-system-ppc instead.");
- }
-#endif
-
/* RAM is soldered to the board so the size cannot be changed */
ram_size = 0x08000000;
memory_region_allocate_system_memory(ram, NULL, "taihu_405ep.ram",
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index 3d4c43b..f5720f9 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -195,13 +195,6 @@ static void bamboo_init(MachineState *machine)
exit(1);
}
-#ifdef TARGET_PPCEMB
- if (!qtest_enabled()) {
- warn_report("qemu-system-ppcemb is deprecated, "
- "please use qemu-system-ppc instead.");
- }
-#endif
-
qemu_register_reset(main_cpu_reset, cpu);
ppc_booke_timers_init(cpu, 400000000, 0);
ppc_dcr_init(env, NULL, NULL);
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 9c77183..250fb86 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -419,13 +419,6 @@ static void sam460ex_init(MachineState *machine)
exit(1);
}
-#ifdef TARGET_PPCEMB
- if (!qtest_enabled()) {
- warn_report("qemu-system-ppcemb is deprecated, "
- "please use qemu-system-ppc instead.");
- }
-#endif
-
qemu_register_reset(main_cpu_reset, cpu);
boot_info = g_malloc0(sizeof(*boot_info));
env->load_info = boot_info;
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 4edb6c7..4a9dd4d 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -607,6 +607,7 @@ static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr)
spapr_populate_cpu_dt(cs, fdt, offset, spapr);
}
+ g_free(rev);
}
static uint32_t spapr_pc_dimm_node(MemoryDeviceInfoList *list, ram_addr_t addr)
@@ -2479,6 +2480,8 @@ static void spapr_init_cpus(sPAPRMachineState *spapr)
object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID,
&error_fatal);
object_property_set_bool(core, true, "realized", &error_fatal);
+
+ object_unref(core);
}
}
}
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 876f0b3..2398ce6 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -34,16 +34,16 @@ static void spapr_cpu_reset(void *opaque)
cpu_reset(cs);
- /* Set compatibility mode to match the boot CPU, which was either set
- * by the machine reset code or by CAS. This should never fail.
- */
- ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
-
/* All CPUs start halted. CPU0 is unhalted from the machine level
* reset code and the rest are explicitly started up by the guest
* using an RTAS call */
cs->halted = 1;
+ /* Set compatibility mode to match the boot CPU, which was either set
+ * by the machine reset code or by CAS. This should never fail.
+ */
+ ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
+
env->spr[SPR_HIOR] = 0;
lpcr = env->spr[SPR_LPCR];
@@ -90,6 +90,7 @@ void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong r
env->nip = nip;
env->gpr[3] = r3;
+ kvmppc_set_reg_ppc_online(cpu, 1);
CPU(cpu)->halted = 0;
/* Enable Power-saving mode Exit Cause exceptions */
ppc_store_lpcr(cpu, env->spr[SPR_LPCR] | pcc->lpcr_pm);
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 5cd676e..6bcb4f4 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1559,7 +1559,7 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
sPAPRMachineState *spapr =
(sPAPRMachineState *) object_dynamic_cast(qdev_get_machine(),
TYPE_SPAPR_MACHINE);
- sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
+ sPAPRMachineClass *smc = spapr ? SPAPR_MACHINE_GET_CLASS(spapr) : NULL;
SysBusDevice *s = SYS_BUS_DEVICE(dev);
sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s);
PCIHostState *phb = PCI_HOST_BRIDGE(s);
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 4ac96bc..d6a0952 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -33,6 +33,7 @@
#include "sysemu/device_tree.h"
#include "sysemu/cpus.h"
#include "sysemu/hw_accel.h"
+#include "kvm_ppc.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
@@ -207,6 +208,7 @@ static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachineState *spapr,
* guest */
ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
cs->halted = 1;
+ kvmppc_set_reg_ppc_online(cpu, 0);
qemu_cpu_kick(cs);
}
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index 7891464..ee9b4b4 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -211,13 +211,6 @@ static void virtex_init(MachineState *machine)
int kernel_size;
int i;
-#ifdef TARGET_PPCEMB
- if (!qtest_enabled()) {
- warn_report("qemu-system-ppcemb is deprecated, "
- "please use qemu-system-ppc instead.");
- }
-#endif
-
/* init CPUs */
cpu = ppc440_init_xilinx(&ram_size, 1, machine->cpu_type, 400000000);
env = &cpu->env;
generated by cgit v1.1 at 2025-02-23 08:46:13 +0000