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-rw-r--r--hw/arm/aspeed.c42
1 files changed, 22 insertions, 20 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index c1f2b9c..0b29028 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -200,33 +200,35 @@ struct AspeedMachineState {
static void aspeed_write_smpboot(ARMCPU *cpu,
const struct arm_boot_info *info)
{
- static const uint32_t poll_mailbox_ready[] = {
+ AddressSpace *as = arm_boot_address_space(cpu, info);
+ static const ARMInsnFixup poll_mailbox_ready[] = {
/*
* r2 = per-cpu go sign value
* r1 = AST_SMP_MBOX_FIELD_ENTRY
* r0 = AST_SMP_MBOX_FIELD_GOSIGN
*/
- 0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5 */
- 0xe21000ff, /* ands r0, r0, #255 */
- 0xe59f201c, /* ldr r2, [pc, #28] */
- 0xe1822000, /* orr r2, r2, r0 */
-
- 0xe59f1018, /* ldr r1, [pc, #24] */
- 0xe59f0018, /* ldr r0, [pc, #24] */
-
- 0xe320f002, /* wfe */
- 0xe5904000, /* ldr r4, [r0] */
- 0xe1520004, /* cmp r2, r4 */
- 0x1afffffb, /* bne <wfe> */
- 0xe591f000, /* ldr pc, [r1] */
- AST_SMP_MBOX_GOSIGN,
- AST_SMP_MBOX_FIELD_ENTRY,
- AST_SMP_MBOX_FIELD_GOSIGN,
+ { 0xee100fb0 }, /* mrc p15, 0, r0, c0, c0, 5 */
+ { 0xe21000ff }, /* ands r0, r0, #255 */
+ { 0xe59f201c }, /* ldr r2, [pc, #28] */
+ { 0xe1822000 }, /* orr r2, r2, r0 */
+
+ { 0xe59f1018 }, /* ldr r1, [pc, #24] */
+ { 0xe59f0018 }, /* ldr r0, [pc, #24] */
+
+ { 0xe320f002 }, /* wfe */
+ { 0xe5904000 }, /* ldr r4, [r0] */
+ { 0xe1520004 }, /* cmp r2, r4 */
+ { 0x1afffffb }, /* bne <wfe> */
+ { 0xe591f000 }, /* ldr pc, [r1] */
+ { AST_SMP_MBOX_GOSIGN },
+ { AST_SMP_MBOX_FIELD_ENTRY },
+ { AST_SMP_MBOX_FIELD_GOSIGN },
+ { 0, FIXUP_TERMINATOR }
};
+ static const uint32_t fixupcontext[FIXUP_MAX] = { 0 };
- rom_add_blob_fixed("aspeed.smpboot", poll_mailbox_ready,
- sizeof(poll_mailbox_ready),
- info->smp_loader_start);
+ arm_write_bootloader("aspeed.smpboot", as, info->smp_loader_start,
+ poll_mailbox_ready, fixupcontext);
}
static void aspeed_reset_secondary(ARMCPU *cpu,