diff options
Diffstat (limited to 'hw')
-rw-r--r-- | hw/arm/armv7m.c | 10 | ||||
-rw-r--r-- | hw/arm/exynos4210.c | 2 | ||||
-rw-r--r-- | hw/arm/highbank.c | 2 | ||||
-rw-r--r-- | hw/arm/integratorcp.c | 2 | ||||
-rw-r--r-- | hw/arm/realview.c | 2 | ||||
-rw-r--r-- | hw/arm/sbsa-ref.c | 2 | ||||
-rw-r--r-- | hw/arm/versatilepb.c | 2 | ||||
-rw-r--r-- | hw/arm/vexpress.c | 4 | ||||
-rw-r--r-- | hw/arm/virt.c | 10 | ||||
-rw-r--r-- | hw/arm/xilinx_zynq.c | 2 | ||||
-rw-r--r-- | hw/arm/xlnx-zcu102.c | 25 | ||||
-rw-r--r-- | hw/core/machine.c | 28 | ||||
-rw-r--r-- | hw/core/qdev-properties-system.c | 2 | ||||
-rw-r--r-- | hw/core/sysbus.c | 2 | ||||
-rw-r--r-- | hw/cpu/a15mpcore.c | 4 | ||||
-rw-r--r-- | hw/cpu/a9mpcore.c | 2 | ||||
-rw-r--r-- | hw/cpu/core.c | 8 | ||||
-rw-r--r-- | hw/i386/pc.c | 16 | ||||
-rw-r--r-- | hw/misc/iotkit-sysctl.c | 2 | ||||
-rw-r--r-- | hw/pci-host/i440fx.c | 32 | ||||
-rw-r--r-- | hw/pci/pci.c | 2 | ||||
-rw-r--r-- | hw/riscv/sifive_e.c | 11 | ||||
-rw-r--r-- | hw/riscv/sifive_u.c | 16 | ||||
-rw-r--r-- | hw/scsi/scsi-bus.c | 4 |
24 files changed, 89 insertions, 103 deletions
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index aa831d6..0e5997d 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -169,28 +169,28 @@ static void armv7m_realize(DeviceState *dev, Error **errp) object_property_set_link(OBJECT(s->cpu), "memory", OBJECT(&s->container), &error_abort); - if (object_property_find(OBJECT(s->cpu), "idau", NULL)) { + if (object_property_find(OBJECT(s->cpu), "idau")) { object_property_set_link(OBJECT(s->cpu), "idau", s->idau, &error_abort); } - if (object_property_find(OBJECT(s->cpu), "init-svtor", NULL)) { + if (object_property_find(OBJECT(s->cpu), "init-svtor")) { if (!object_property_set_uint(OBJECT(s->cpu), "init-svtor", s->init_svtor, errp)) { return; } } - if (object_property_find(OBJECT(s->cpu), "start-powered-off", NULL)) { + if (object_property_find(OBJECT(s->cpu), "start-powered-off")) { if (!object_property_set_bool(OBJECT(s->cpu), "start-powered-off", s->start_powered_off, errp)) { return; } } - if (object_property_find(OBJECT(s->cpu), "vfp", NULL)) { + if (object_property_find(OBJECT(s->cpu), "vfp")) { if (!object_property_set_bool(OBJECT(s->cpu), "vfp", s->vfp, errp)) { return; } } - if (object_property_find(OBJECT(s->cpu), "dsp", NULL)) { + if (object_property_find(OBJECT(s->cpu), "dsp")) { if (!object_property_set_bool(OBJECT(s->cpu), "dsp", s->dsp, errp)) { return; } diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 081bbff..ced2769 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -214,7 +214,7 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) /* By default A9 CPUs have EL3 enabled. This board does not currently * support EL3 so the CPU EL3 property is disabled before realization. */ - if (object_property_find(cpuobj, "has_el3", NULL)) { + if (object_property_find(cpuobj, "has_el3")) { object_property_set_bool(cpuobj, "has_el3", false, &error_fatal); } diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 7da9841..da0510d 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -276,7 +276,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) &error_abort); } - if (object_property_find(cpuobj, "reset-cbar", NULL)) { + if (object_property_find(cpuobj, "reset-cbar")) { object_property_set_int(cpuobj, "reset-cbar", MPCORE_PERIPHBASE, &error_abort); } diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index de670b0..16e8985 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -603,7 +603,7 @@ static void integratorcp_init(MachineState *machine) * currently support EL3 so the CPU EL3 property is disabled before * realization. */ - if (object_property_find(cpuobj, "has_el3", NULL)) { + if (object_property_find(cpuobj, "has_el3")) { object_property_set_bool(cpuobj, "has_el3", false, &error_fatal); } diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 5f1f36b..0831159 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -108,7 +108,7 @@ static void realview_init(MachineState *machine, * does not currently support EL3 so the CPU EL3 property is disabled * before realization. */ - if (object_property_find(cpuobj, "has_el3", NULL)) { + if (object_property_find(cpuobj, "has_el3")) { object_property_set_bool(cpuobj, "has_el3", false, &error_fatal); } diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index bcb2cb4..257ada9 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -703,7 +703,7 @@ static void sbsa_ref_init(MachineState *machine) numa_cpu_pre_plug(&possible_cpus->cpus[cs->cpu_index], DEVICE(cpuobj), &error_fatal); - if (object_property_find(cpuobj, "reset-cbar", NULL)) { + if (object_property_find(cpuobj, "reset-cbar")) { object_property_set_int(cpuobj, "reset-cbar", sbsa_ref_memmap[SBSA_CPUPERIPHS].base, &error_abort); diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 84d4677..1ea5534 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -213,7 +213,7 @@ static void versatile_init(MachineState *machine, int board_id) * currently support EL3 so the CPU EL3 property is disabled before * realization. */ - if (object_property_find(cpuobj, "has_el3", NULL)) { + if (object_property_find(cpuobj, "has_el3")) { object_property_set_bool(cpuobj, "has_el3", false, &error_fatal); } diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 94ff094..531f3a1 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -218,12 +218,12 @@ static void init_cpus(MachineState *ms, const char *cpu_type, object_property_set_bool(cpuobj, "has_el3", false, NULL); } if (!virt) { - if (object_property_find(cpuobj, "has_el2", NULL)) { + if (object_property_find(cpuobj, "has_el2")) { object_property_set_bool(cpuobj, "has_el2", false, NULL); } } - if (object_property_find(cpuobj, "reset-cbar", NULL)) { + if (object_property_find(cpuobj, "reset-cbar")) { object_property_set_int(cpuobj, "reset-cbar", periphbase, &error_abort); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index acf9bfb..1231a19 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1806,7 +1806,7 @@ static void machvirt_init(MachineState *machine) object_property_set_bool(cpuobj, "has_el3", false, NULL); } - if (!vms->virt && object_property_find(cpuobj, "has_el2", NULL)) { + if (!vms->virt && object_property_find(cpuobj, "has_el2")) { object_property_set_bool(cpuobj, "has_el2", false, NULL); } @@ -1822,15 +1822,15 @@ static void machvirt_init(MachineState *machine) } if (vmc->kvm_no_adjvtime && - object_property_find(cpuobj, "kvm-no-adjvtime", NULL)) { + object_property_find(cpuobj, "kvm-no-adjvtime")) { object_property_set_bool(cpuobj, "kvm-no-adjvtime", true, NULL); } - if (vmc->no_pmu && object_property_find(cpuobj, "pmu", NULL)) { + if (vmc->no_pmu && object_property_find(cpuobj, "pmu")) { object_property_set_bool(cpuobj, "pmu", false, NULL); } - if (object_property_find(cpuobj, "reset-cbar", NULL)) { + if (object_property_find(cpuobj, "reset-cbar")) { object_property_set_int(cpuobj, "reset-cbar", vms->memmap[VIRT_CPUPERIPHS].base, &error_abort); @@ -1850,7 +1850,7 @@ static void machvirt_init(MachineState *machine) * The property exists only if MemTag is supported. * If it is, we must allocate the ram to back that up. */ - if (!object_property_find(cpuobj, "tag-memory", NULL)) { + if (!object_property_find(cpuobj, "tag-memory")) { error_report("MTE requested, but not supported " "by the guest CPU"); exit(1); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 2c0bff4..b72772b 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -196,7 +196,7 @@ static void zynq_init(MachineState *machine) * currently support EL3 so the CPU EL3 property is disabled before * realization. */ - if (object_property_find(OBJECT(cpu), "has_el3", NULL)) { + if (object_property_find(OBJECT(cpu), "has_el3")) { object_property_set_bool(OBJECT(cpu), "has_el3", false, &error_fatal); } diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 066571a..ad7fff9 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -206,20 +206,8 @@ static void xlnx_zcu102_machine_instance_init(Object *obj) /* Default to secure mode being disabled */ s->secure = false; - object_property_add_bool(obj, "secure", zcu102_get_secure, - zcu102_set_secure); - object_property_set_description(obj, "secure", - "Set on/off to enable/disable the ARM " - "Security Extensions (TrustZone)"); - /* Default to virt (EL2) being disabled */ s->virt = false; - object_property_add_bool(obj, "virtualization", zcu102_get_virt, - zcu102_set_virt); - object_property_set_description(obj, "virtualization", - "Set on/off to enable/disable emulating a " - "guest CPU which implements the ARM " - "Virtualization Extensions"); } static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) @@ -235,6 +223,19 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; mc->default_ram_id = "ddr-ram"; + + object_class_property_add_bool(oc, "secure", zcu102_get_secure, + zcu102_set_secure); + object_class_property_set_description(oc, "secure", + "Set on/off to enable/disable the ARM " + "Security Extensions (TrustZone)"); + + object_class_property_add_bool(oc, "virtualization", zcu102_get_virt, + zcu102_set_virt); + object_class_property_set_description(oc, "virtualization", + "Set on/off to enable/disable emulating a " + "guest CPU which implements the ARM " + "Virtualization Extensions"); } static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { diff --git a/hw/core/machine.c b/hw/core/machine.c index ea26d61..9b02fb2 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -754,23 +754,15 @@ static void smp_parse(MachineState *ms, QemuOpts *opts) exit(1); } - if (sockets * cores * threads > ms->smp.max_cpus) { - error_report("cpu topology: " - "sockets (%u) * cores (%u) * threads (%u) > " - "maxcpus (%u)", + if (sockets * cores * threads != ms->smp.max_cpus) { + error_report("Invalid CPU topology: " + "sockets (%u) * cores (%u) * threads (%u) " + "!= maxcpus (%u)", sockets, cores, threads, ms->smp.max_cpus); exit(1); } - if (sockets * cores * threads != ms->smp.max_cpus) { - warn_report("Invalid CPU topology deprecated: " - "sockets (%u) * cores (%u) * threads (%u) " - "!= maxcpus (%u)", - sockets, cores, threads, - ms->smp.max_cpus); - } - ms->smp.cpus = cpus; ms->smp.cores = cores; ms->smp.threads = threads; @@ -874,6 +866,12 @@ static void machine_class_init(ObjectClass *oc, void *data) machine_get_memory_encryption, machine_set_memory_encryption); object_class_property_set_description(oc, "memory-encryption", "Set memory encryption object to use"); + + object_class_property_add_str(oc, "memory-backend", + machine_get_memdev, machine_set_memdev); + object_class_property_set_description(oc, "memory-backend", + "Set RAM backend" + "Valid value is ID of hostmem based backend"); } static void machine_class_base_init(ObjectClass *oc, void *data) @@ -925,12 +923,6 @@ static void machine_initfn(Object *obj) "Table (HMAT)"); } - object_property_add_str(obj, "memory-backend", - machine_get_memdev, machine_set_memdev); - object_property_set_description(obj, "memory-backend", - "Set RAM backend" - "Valid value is ID of hostmem based backend"); - /* Register notifier when init is done for sysbus sanity checks */ ms->sysbus_notifier.notify = machine_init_notify; qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c index 3e4f16f..b29daf4 100644 --- a/hw/core/qdev-properties-system.c +++ b/hw/core/qdev-properties-system.c @@ -460,7 +460,7 @@ void qdev_set_nic_properties(DeviceState *dev, NICInfo *nd) qdev_prop_set_netdev(dev, "netdev", nd->netdev); } if (nd->nvectors != DEV_NVECTORS_UNSPECIFIED && - object_property_find(OBJECT(dev), "vectors", NULL)) { + object_property_find(OBJECT(dev), "vectors")) { qdev_prop_set_uint32(dev, "vectors", nd->nvectors); } nd->instantiated = 1; diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 294f90b..68e8dc8 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -93,7 +93,7 @@ bool sysbus_has_irq(SysBusDevice *dev, int n) char *prop = g_strdup_printf("%s[%d]", SYSBUS_DEVICE_GPIO_IRQ, n); ObjectProperty *r; - r = object_property_find(OBJECT(dev), prop, NULL); + r = object_property_find(OBJECT(dev), prop); g_free(prop); return (r != NULL); diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index c377be3..774ca99 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -66,11 +66,11 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) * either all the CPUs have TZ, or none do. */ cpuobj = OBJECT(qemu_get_cpu(0)); - has_el3 = object_property_find(cpuobj, "has_el3", NULL) && + has_el3 = object_property_find(cpuobj, "has_el3") && object_property_get_bool(cpuobj, "has_el3", &error_abort); qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); /* Similarly for virtualization support */ - has_el2 = object_property_find(cpuobj, "has_el2", NULL) && + has_el2 = object_property_find(cpuobj, "has_el2") && object_property_get_bool(cpuobj, "has_el2", &error_abort); qdev_prop_set_bit(gicdev, "has-virtualization-extensions", has_el2); } diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index ec186d4..d03f57e 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -81,7 +81,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) /* Make the GIC's TZ support match the CPUs. We assume that * either all the CPUs have TZ, or none do. */ - has_el3 = object_property_find(cpuobj, "has_el3", NULL) && + has_el3 = object_property_find(cpuobj, "has_el3") && object_property_get_bool(cpuobj, "has_el3", &error_abort); qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); diff --git a/hw/cpu/core.c b/hw/cpu/core.c index 3a65929..92d3b2f 100644 --- a/hw/cpu/core.c +++ b/hw/cpu/core.c @@ -69,10 +69,6 @@ static void cpu_core_instance_init(Object *obj) MachineState *ms = MACHINE(qdev_get_machine()); CPUCore *core = CPU_CORE(obj); - object_property_add(obj, "core-id", "int", core_prop_get_core_id, - core_prop_set_core_id, NULL, NULL); - object_property_add(obj, "nr-threads", "int", core_prop_get_nr_threads, - core_prop_set_nr_threads, NULL, NULL); core->nr_threads = ms->smp.threads; } @@ -81,6 +77,10 @@ static void cpu_core_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); set_bit(DEVICE_CATEGORY_CPU, dc->categories); + object_class_property_add(oc, "core-id", "int", core_prop_get_core_id, + core_prop_set_core_id, NULL, NULL); + object_class_property_add(oc, "nr-threads", "int", core_prop_get_nr_threads, + core_prop_set_nr_threads, NULL, NULL); } static const TypeInfo cpu_core_type_info = { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b553693..1e2ab5e 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -746,23 +746,15 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts) exit(1); } - if (sockets * dies * cores * threads > ms->smp.max_cpus) { - error_report("cpu topology: " - "sockets (%u) * dies (%u) * cores (%u) * threads (%u) > " - "maxcpus (%u)", + if (sockets * dies * cores * threads != ms->smp.max_cpus) { + error_report("Invalid CPU topology deprecated: " + "sockets (%u) * dies (%u) * cores (%u) * threads (%u) " + "!= maxcpus (%u)", sockets, dies, cores, threads, ms->smp.max_cpus); exit(1); } - if (sockets * dies * cores * threads != ms->smp.max_cpus) { - warn_report("Invalid CPU topology deprecated: " - "sockets (%u) * dies (%u) * cores (%u) * threads (%u) " - "!= maxcpus (%u)", - sockets, dies, cores, threads, - ms->smp.max_cpus); - } - ms->smp.cpus = cpus; ms->smp.cores = cores; ms->smp.threads = threads; diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c index 2697833..964b48c 100644 --- a/hw/misc/iotkit-sysctl.c +++ b/hw/misc/iotkit-sysctl.c @@ -83,7 +83,7 @@ static void set_init_vtor(uint64_t cpuid, uint32_t vtor) Object *cpuobj = OBJECT(arm_get_cpu_by_id(cpuid)); if (cpuobj) { - if (object_property_find(cpuobj, "init-svtor", NULL)) { + if (object_property_find(cpuobj, "init-svtor")) { object_property_set_uint(cpuobj, "init-svtor", vtor, &error_abort); } } diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index aecbcc2..28c9bae 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -210,22 +210,6 @@ static void i440fx_pcihost_initfn(Object *obj) "pci-conf-idx", 4); memory_region_init_io(&s->data_mem, obj, &pci_host_data_le_ops, s, "pci-conf-data", 4); - - object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_START, "uint32", - i440fx_pcihost_get_pci_hole_start, - NULL, NULL, NULL); - - object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_END, "uint32", - i440fx_pcihost_get_pci_hole_end, - NULL, NULL, NULL); - - object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_START, "uint64", - i440fx_pcihost_get_pci_hole64_start, - NULL, NULL, NULL); - - object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_END, "uint64", - i440fx_pcihost_get_pci_hole64_end, - NULL, NULL, NULL); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) @@ -401,6 +385,22 @@ static void i440fx_pcihost_class_init(ObjectClass *klass, void *data) device_class_set_props(dc, i440fx_props); /* Reason: needs to be wired up by pc_init1 */ dc->user_creatable = false; + + object_class_property_add(klass, PCI_HOST_PROP_PCI_HOLE_START, "uint32", + i440fx_pcihost_get_pci_hole_start, + NULL, NULL, NULL); + + object_class_property_add(klass, PCI_HOST_PROP_PCI_HOLE_END, "uint32", + i440fx_pcihost_get_pci_hole_end, + NULL, NULL, NULL); + + object_class_property_add(klass, PCI_HOST_PROP_PCI_HOLE64_START, "uint64", + i440fx_pcihost_get_pci_hole64_start, + NULL, NULL, NULL); + + object_class_property_add(klass, PCI_HOST_PROP_PCI_HOLE64_END, "uint64", + i440fx_pcihost_get_pci_hole64_end, + NULL, NULL, NULL); } static const TypeInfo i440fx_pcihost_info = { diff --git a/hw/pci/pci.c b/hw/pci/pci.c index de0fae1..fce7254 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1900,7 +1900,7 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus, * a temporary instance here to be able to check it. */ Object *obj = object_new_with_class(OBJECT_CLASS(dc)); - if (object_property_find(obj, "netdev", NULL)) { + if (object_property_find(obj, "netdev")) { g_ptr_array_add(pci_nic_models, (gpointer)name); } object_unref(obj); diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 759059c..fcfac16 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -137,11 +137,6 @@ static void sifive_e_machine_instance_init(Object *obj) SiFiveEState *s = RISCV_E_MACHINE(obj); s->revb = false; - object_property_add_bool(obj, "revb", sifive_e_machine_get_revb, - sifive_e_machine_set_revb); - object_property_set_description(obj, "revb", - "Set on to tell QEMU that it should model " - "the revB HiFive1 board"); } static void sifive_e_machine_class_init(ObjectClass *oc, void *data) @@ -152,6 +147,12 @@ static void sifive_e_machine_class_init(ObjectClass *oc, void *data) mc->init = sifive_e_machine_init; mc->max_cpus = 1; mc->default_cpu_type = SIFIVE_E_CPU; + + object_class_property_add_bool(oc, "revb", sifive_e_machine_get_revb, + sifive_e_machine_set_revb); + object_class_property_set_description(oc, "revb", + "Set on to tell QEMU that it should model " + "the revB HiFive1 board"); } static const TypeInfo sifive_e_machine_typeinfo = { diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index a97637f..6ad975d 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -568,14 +568,6 @@ static void sifive_u_machine_instance_init(Object *obj) SiFiveUState *s = RISCV_U_MACHINE(obj); s->start_in_flash = false; - object_property_add_bool(obj, "start-in-flash", - sifive_u_machine_get_start_in_flash, - sifive_u_machine_set_start_in_flash); - object_property_set_description(obj, "start-in-flash", - "Set on to tell QEMU's ROM to jump to " - "flash. Otherwise QEMU will jump to DRAM " - "or L2LIM depending on the msel value"); - s->msel = 0; object_property_add(obj, "msel", "uint32", sifive_u_machine_get_uint32_prop, @@ -599,6 +591,14 @@ static void sifive_u_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT; mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1; mc->default_cpus = mc->min_cpus; + + object_class_property_add_bool(oc, "start-in-flash", + sifive_u_machine_get_start_in_flash, + sifive_u_machine_set_start_in_flash); + object_class_property_set_description(oc, "start-in-flash", + "Set on to tell QEMU's ROM to jump to " + "flash. Otherwise QEMU will jump to DRAM " + "or L2LIM depending on the msel value"); } static const TypeInfo sifive_u_machine_typeinfo = { diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c index df65cc2..3284a5d 100644 --- a/hw/scsi/scsi-bus.c +++ b/hw/scsi/scsi-bus.c @@ -270,10 +270,10 @@ SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, BlockBackend *blk, object_property_set_int(OBJECT(dev), "bootindex", bootindex, &error_abort); } - if (object_property_find(OBJECT(dev), "removable", NULL)) { + if (object_property_find(OBJECT(dev), "removable")) { qdev_prop_set_bit(dev, "removable", removable); } - if (serial && object_property_find(OBJECT(dev), "serial", NULL)) { + if (serial && object_property_find(OBJECT(dev), "serial")) { qdev_prop_set_string(dev, "serial", serial); } if (!qdev_prop_set_drive_err(dev, "drive", blk, errp)) { |